Browse Prior Art Database

Subsystem VCC Stabilization Detection for Power Management

IP.com Disclosure Number: IPCOM000105725D
Original Publication Date: 1993-Sep-01
Included in the Prior Art Database: 2005-Mar-20
Document File: 2 page(s) / 36K

Publishing Venue

IBM

Related People

Sugi, H: AUTHOR

Abstract

Disclosed is a circuit for detecting the stabilization condition in the DC voltage of a personal computer subsystem.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 96% of the total text.

Subsystem VCC Stabilization Detection for Power Management

      Disclosed is a circuit for detecting the stabilization
condition in the DC voltage of a personal computer subsystem.

      As shown in the figure, the circuit has three inputs and one
output, as follows:

     Three Input Signals:
         VccxIN, a reference voltage, and a clock signal.
     One Output Signal:
         VccxOUT.

      The VccxIN is the DC supply voltage for a subsystem.  When an
external power supply circuits start generating the VccxIN, it may
have skews and glitches.  The AC filter is a high-pass filter that
forwards only those glitches to the reset inputs of latch 1 and latch
2.  When a glitch is detected at the AC filter, both latch 1 and
latch 2 will be cleared.

      The reference voltage provides a comparator with a voltage
level above which the VccxIN is thought to be high enough for
operating the whole subsystem.  The comparator generates its output
only when the VccxIN exceeds the reference voltage.  The clock
latches a D input at each of the latches.  For the D at latch 2 to be
at a positive level, VccxIN must stay in a stable high level for a
complete clock cycle.  When the latch 2 generates the VccxOK output,
it means that the VccxIN is ready for use for the rest of the
subsystem.  If any glitch has been detected in the VccxIN voltage
before the VccxOK is generated, both latch 1 and latch 2 are cleared.
Then at least another 2 cloc...