Browse Prior Art Database

Bridge Architecture Including Mutiple Instances of a Real-Time Bus

IP.com Disclosure Number: IPCOM000105873D
Original Publication Date: 1993-Sep-01
Included in the Prior Art Database: 2005-Mar-20
Document File: 2 page(s) / 73K

Publishing Venue

IBM

Related People

MacInnis, AG: AUTHOR

Abstract

Disclosed is a method and structure for implementing multiple data buses, any or all of which may have guaranteed real-time performance connected by a bridge function. The real-time performance of the buses is maintained while accesses occur across the multiple buses (i.e., between devices that are attached to different buses which are joined using a bridge).

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Bridge Architecture Including Mutiple Instances of a Real-Time Bus

      Disclosed is a method and structure for implementing multiple
data buses, any or all of which may have guaranteed real-time
performance connected by a bridge function.  The real-time
performance of the buses is maintained while accesses occur across
the multiple buses (i.e., between devices that are attached to
different buses which are joined using a bridge).

There are many motivations for implementing a system with multiple
buses.  These include:

1.  The need for short deadlines and, hence, few devices on each bus;
    smaller data buffers result.

2.  Electrical performance and driver design and the need to keep
    traces short and minimize the number of devices on each bus in
    order to operate the buses at high speed.

3.  The need for multiple differing bus designs (e.g., for
    compatibility).

4.  The need to increase physical spacing between devices.

      Two or more buses may be interconnected via a bridge device or
multiple bridge devices.  The bridge and the connected buses have
some or all of these characteristics:

1.  The arbitration and scheduling functions of the buses are
    independent of one another.  This allows the performance and
    behavior of each to be optimized to the task performed.

2.  Data is written from one bus to another using what is some- times
    called "posted writes":  the data to be written is held in a
    buffer in a bridge and is later written to a different bus.

3.  Each bus has guaranteed real-time operation, where the passing of
    data, as in the item above, is itself a task with a guaranteed
    deadline on the destination bus.

4.  The sizes of the buffers for posted writes are bounded by
    deadline guarantees and bounds on the size...