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Procedures of Producing Thin Si Layers in SIMOX

IP.com Disclosure Number: IPCOM000106012D
Original Publication Date: 1993-Sep-01
Included in the Prior Art Database: 2005-Mar-20
Document File: 2 page(s) / 67K

Publishing Venue

IBM

Related People

Davari, B: AUTHOR [+3]

Abstract

SIMOX wafers are a promising technique for using SOI (silicon-on- insulator) in CMOS technology. In the present process for fabricating this material, Si wafers are implanted with oxygen at high doses and implant energies, 1-2x10sup(18) cm sup(-2) and 200 keV. The wafer becomes heated to 600-650ºC by the beam energy. After implant the wafer is annealed at 1300ºC for 6 hours to create the Si crystalline layer on top of a buried SiOx region (Fig 1). The thicknesses of the SiOx and Si layers are coupled together by the implant energy. To make thinner layers the implant energy must be reduced, which makes both the Si and SiOx regions thinner. However, since the beam power is used to obtain the necessary 600ºC temperature, it cannot be reduced below 150 keV, which limits the minimum thicknesses directly attainable.

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Procedures of Producing Thin Si Layers in SIMOX

      SIMOX wafers are a promising technique for using SOI
(silicon-on- insulator) in CMOS technology.  In the present process
for fabricating this material, Si wafers are implanted with oxygen at
high doses and implant energies, 1-2x10sup(18) cm sup(-2)  and 200
keV.  The wafer becomes heated to 600-650ºC by the beam energy.
After implant the wafer is annealed at 1300ºC for 6 hours to
create the Si crystalline layer on top of a buried SiOx region (Fig
1).  The thicknesses of the SiOx and Si layers are coupled together
by the implant energy.  To make thinner layers the implant energy
must be reduced, which makes both the Si and SiOx regions thinner.
However, since the beam power is used to obtain the necessary
600ºC temperature, it cannot be reduced below 150 keV, which
limits the minimum thicknesses directly attainable.  Moreover, it has
been desirable to keep the SiOx region thicker than 2500-3000A
to prevent leakage across this oxide in finished devices.

     One way to make the Si layer thinner while keeping the SiOx
thick is to oxidize the Si layer during the anneal or after.  This
step contributes to thickness non-uniformity, adds cost and may also
contribute to impurity diffusion.

     One additional detrimental effect of the normal method for
producing SIMOX wafers is the severe sputtering of Si at the surface,
removing 1000-1400 A  of material and leading to
uncertainty.

     The major feature of the invention is to...