Browse Prior Art Database

Adapter Card Operating Mode is Dependent on Bus Master Identification

IP.com Disclosure Number: IPCOM000106028D
Original Publication Date: 1993-Sep-01
Included in the Prior Art Database: 2005-Mar-20
Document File: 2 page(s) / 49K

Publishing Venue

IBM

Related People

Buskirk, G: AUTHOR [+2]

Abstract

Disclosed is an adaptor card design for a multiprocessor computer system in which the operating mode of the adaptor card is dependent on which bus master is performing the access. The design is applicable to Micro Channel* computers or other bus architectures having an arbitration bus or other means of identifying the active bus master.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 58% of the total text.

Adapter Card Operating Mode is Dependent on Bus Master Identification

      Disclosed is an adaptor card design for a multiprocessor
computer system in which the operating mode of the adaptor card is
dependent on which bus master is performing the access.  The design
is applicable to Micro Channel* computers or other bus architectures
having an arbitration bus or other means of identifying the active
bus master.

      The slave adapter card monitors the arbitration bus and the
Arbitration/Grant signal.  During an access to the slave card, an
operating mode table lookup is performed on the basis of the
identification of the bus master, and the slave responds in a mode
determined by the result of the table lookup.

Several applications of this idea are disclosed:

1.  A memory slave which has diagnostic modes allowing access to
    uncorrected data or Error Detection and Correction checkbits.
    Access in these modes is enabled by means of a table lookup of
    the bus master identification, so that secondary masters continue
    to receive corrected data while diagnostic operations are being
    performed.

2.  A Memory or I/O slave which performs a conditional byte swap of
    data during a read or write access, on the basis of a table
    lookup of the bus master identification.  This allows "Little
    Endian" processors such as the Intel x86 family to conveniently
    share operands with "Big Endian" processors such as the Motorola
...