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Browse Prior Art Database

Microcoded Interface Between RISC Processor and Graphics Adapter

IP.com Disclosure Number: IPCOM000106103D
Original Publication Date: 1993-Sep-01
Included in the Prior Art Database: 2005-Mar-20
Document File: 2 page(s) / 26K

Publishing Venue

IBM

Related People

Greenwell, PE: AUTHOR [+4]

Abstract

Disclosed is a mechanism of interfacing a RISC* microprocessor to a display adapter via the use of microcode.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 100% of the total text.

Microcoded Interface Between RISC Processor and Graphics Adapter

      Disclosed is a mechanism of interfacing a RISC* microprocessor
to a display adapter via the use of microcode.

      The graphics adapter is accessed by I/O load and store
commands.  Data and address are transmitted over a 32 bit multiplexed
data bus while commands are sent over a 5 bit command bus.  These
commands are:

o   Store I/O Address - Write Command
o   Store Data
o   Store I/O Address - Read Command
o   Read Data With Continue
o   Read Data With Terminal Count

      A microcode sequencer uses the above 5 commands in 4 separate
microcode routines.  A busy signal from the frame buffer is tested by
the microsequencer before transmitting more data for a write string
operation.  String operations always transfer double words.

* Trademark of IBM Corp.