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Cell Optimization for Low Power CMOS Large Scale Integration

IP.com Disclosure Number: IPCOM000106127D
Original Publication Date: 1993-Sep-01
Included in the Prior Art Database: 2005-Mar-20
Document File: 4 page(s) / 128K

Publishing Venue

IBM

Related People

Mashima, I: AUTHOR [+2]

Abstract

Disclosed is a method of Cell Optimization which is newly defined for low power LSI design. Cell Optimizer (CO) is to select the proper cell (block) among candidates with the same function so that total power dissipation can be minimized.

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Cell Optimization for Low Power CMOS Large Scale Integration

      Disclosed is a method of Cell Optimization which is newly
defined for low power LSI design.  Cell Optimizer (CO) is to select
the proper cell (block) among candidates with the same function so
that total power dissipation can be minimized.

      Cell Optimizer (CO) is the tool to select the proper cell among
those with same function to reduce total chip power.  For example,
when an inverter cell will be used in a logic network, which should
be used among Inverters must be determined as shown in Fig. 1.  Each
of <A>, <B> and <C> is a hard macro prepared already.  CO selects the
proper one among these three from the view point of LSI total power.

      The lowest power among these three in Fig. 1 should be <A>, but
,in fact, <A> is not always lowest power.  Because it is absolutely
dependent on input transition time to each cell which causes DC power
consumption.  Therefore, a source cell with many fanouts should be
<B> or <C> rather than <A>.

      <A>, <B> and <C> are defined as power modes and these power
modes are prepared for all kinds of cells(basic cells).  Effective
capacitance, Ceff of inverter cell is estimated by a circuit
simulator beforehand;

      Ceff sub A = a1 = Trin + a2
      Ceff sub B = 2a1 = Trin + a2
      Ceff sub C = 3a1 = Trom + a2

      Suffix A, B and C mean power modes and a1, a2 are coefficients,
which are equal or greater than zero.  From above equations, the
following relation can be obtained.

      Ceff sub A le Ceff sub B le Ceff sub C

      In addition, the relation of input capacitances with each power
mode can be also obtained as follows:

      Cin sub A le Cin sub B le Cin sub C

      On the other hand, Trout is dependent on the driving capability
of cell.  Ceff of sink cells becomes larger at mode <A> of source
cell.  The relation between Source cell and Sink cell in logic
network is shown in Fig. 2.

      Regarding the power mode <A>, <B> and <C> of source cell, the
relation of Sink_Ceff is:

      Sink_Ceff sub A ge Sink_Ceff sub B ge Sink_Ceff sub C

      Total ceff which sums Source_Ceff and Sink_Ceff with each
source cell power mode must be calculated and decided the proper
power mode to achieve low power circuits among three modes.  Total
Ceff is generally expressed as follows:

      Total_Ceff=Source+Ceff + sum of Sink_Ceff

      The general algorithm of CO (Cell Optimizer) is described as
follows:

 0.  Power mode <A> is assigned to all cells in LSI.

 1.  Input transition time, Trin to each cell in a whole LSI is
calculated.

 2.  Power mode of Source cell connected on a net is determined by
the following calculation of effective capacitance.

      (1) Regarding neti (start from i=1), Ceff of Source cell_i at
each power mode is calculated as follows:

      Source_Ceff sub i sub A =a1(A)=Trin sub i + a2(A)
      Source_Ce...