Browse Prior Art Database

Thermally Conductive Substrate Mounted Multi-Chip Module Cap

IP.com Disclosure Number: IPCOM000106130D
Original Publication Date: 1993-Sep-01
Included in the Prior Art Database: 2005-Mar-20
Document File: 2 page(s) / 48K

Publishing Venue

IBM

Related People

Buller, L: AUTHOR [+3]

Abstract

A cooling technique has been devised to both protect the electronic chips on the surface of a single chip module (Fig. 1) or a multi-chip module (Fig. 2) and to conduct the heat generated by the operating chips to the module surface for conductive dissipation into the system hardware.

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Thermally Conductive Substrate Mounted Multi-Chip Module Cap

      A cooling technique has been devised to both protect the
electronic chips on the surface of a single chip module (Fig. 1) or a
multi-chip module (Fig. 2) and to conduct the heat generated by the
operating chips to the module surface for conductive dissipation into
the system hardware.

      The enhancement, Fig. 1, is affected after the electronic chips
(1) are assembled to the module substrate (2).  As described
schematically in the figures, a thin layer of a thermally conductive
but electrically insulating material (3) is place between the chip
(1) and a formed metal cover (4).  The metal cover (4) is placed over
the chip providing a close conductive coupling between the chip and
the substrate through a wide flange (5) formed on the cover.  The
flange (5) is attached through a mating pad on the module surface (6)
which encircles the circuit chip.

      This technique thermally couples the circuit chip to the module
substrate through a conduction path that enhances the conduction
already present through the C4 bonds.  Making the path as short as
possible (shown in Fig. 2 for multi-chip modules) reduces the
conductive resistance and enhances the capability of dissipating the
resultant heat generated.  The proposed technique also enhances the
ability to package chips of various thickness on the same substrate
and optimize the thermal performance.  The conduction present in this
methodology...