Browse Prior Art Database

High Pressure Sputtering to Eliminate Salicide Bridging

IP.com Disclosure Number: IPCOM000106154D
Original Publication Date: 1993-Oct-01
Included in the Prior Art Database: 2005-Mar-20
Document File: 2 page(s) / 53K

Publishing Venue

IBM

Related People

Agnello, PD: AUTHOR [+4]

Abstract

Conventional Titanium Salicide processing uses sputtered or evaporated Ti followed by a two step anneal to form C49 and then C54 phase TiSi2. Because Si is the diffusing species during the thermal anneals, extensive silicide bridge formation can occur on insulator regions of the device. Normal wet etch between or after C49 and C54 anneals only removes unreacted Ti and can not etch bridging TiSi material without sacrificing small quantities of silicide from the device regions. We disclose here sputtering the Ti at pressures 5 to 10 times higher than convention using Ar or other heavy inert gas in order to effect more gas phase collisions, resulting in less oriented Ti deposits, and thereby reducing silicide bridging.

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High Pressure Sputtering to Eliminate Salicide Bridging

      Conventional Titanium Salicide processing uses sputtered or
evaporated Ti followed by a two step anneal to form C49 and then C54
phase TiSi2.  Because Si is the diffusing species during the thermal
anneals, extensive silicide bridge formation can occur on insulator
regions of the device.  Normal wet etch between or after C49 and C54
anneals only removes unreacted Ti and can not etch bridging TiSi
material without sacrificing small quantities of silicide from the
device regions.  We disclose here sputtering the Ti at pressures 5 to
10 times higher than convention using Ar or other heavy inert gas in
order to effect more gas phase collisions, resulting in less oriented
Ti deposits, and thereby reducing silicide bridging.

      It has been discovered by the inventors that bridging is
enhanced on parts of wafers where the initial Ti grain structure
displays the highest degree of order.  Figure 1 is a wafer map
showing the isolation resistance as a function of the chip location,
illustrating that the bridging is worse at wafer edge when Ti is
sputtered at conventional low pressures (1-4mT).  This correlates to
x-ray diffraction intensity data whereby Ti grains are oriented
preferentially along the (0002) crystal direction, but 70% of the
grains are randomly oriented at wafer center, and only 15% are random
at wafer edge.  More sputtering from the edge of the sputter target
and therefore more directional...