Browse Prior Art Database

Write Cache Management Structure

IP.com Disclosure Number: IPCOM000106182D
Original Publication Date: 1993-Oct-01
Included in the Prior Art Database: 2005-Mar-20
Document File: 6 page(s) / 227K

Publishing Venue

IBM

Related People

Christianson, MD: AUTHOR [+5]

Abstract

This control design efficiently manages a direct access storage device (DASD) write cache and allowsthe best compaction of DASD write operations.By use of a non-volatile DASD write cache, system writes can can be acknowledged as completed whilethe actual writes to the DASD can be delayed. Also, with this write cache, multiple DASD writes can be combined into a single DASD operation bytaking advantage of the SCSI skip write operation. Skip operations of up to 128K with up to 127K of skip gaps can be built. It also provides a way to test the write cache for read hits.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 28% of the total text.

Write Cache Management Structure

      This control design efficiently manages a direct access storage
device (DASD) write cache and allowsthe best compaction of DASD write
operations.By use of a non-volatile DASD write cache, system writes
can can be acknowledged as completed whilethe actual writes to the
DASD can be delayed.  Also, with this write cache, multiple DASD
writes can be combined into a single DASD operation bytaking
advantage of the SCSI skip write operation.  Skip operations of up to
128K with up to 127K of skip gaps can be built.  It also provides a
way to test the write cache for read hits.

      The non-volatile (NV) write cache is managed via the use of
Sector Data Descriptors (SDD) and Cache Management Stacks (CMS).
This is the most efficient way to manage the write cache.  Its
structure allows the building of the largest possible skip write
operation with as few memory accesses as possible.

      SDD -- The Data Storage Buffers and the NV Cache Storage
Buffers are segmented into virtual pages.Each page corresponds to a
DASD sector of 520 bytes.  A 13 bit Sector Data Descriptor (SDD) is
used to address each virtual page on the IOP.

      CMS Entry -- For every SDD there will be an 8-byte Entry.  The
Entries consist of an LBA, a file ID, control flags, and a pointer to
the next and previous CMS Entries.  The Entry will hold the status
for one DASD sectors worth of space in the write cache.  The valid
cache statuses are listed below in the control flag definition.

Note:  The Entries are built and modified by either hardware or
Note:
Note:
Note:
microcode.

Bits      Function
Bits      Function
Bits      Function
Bits      Function

00-02     Control Flag
00-02
00-02
00-02

          000       Unallocated
          001       CMS Entry allocated but not written
          010       CMS Entry logged and sorted, not marked for flush
          011       Entry logged and sorted, marked for flush
          100       Write in progress
          101       Read in progress
          110-111   Reserved

03-15     SDD for next Entry in the CMS.
03-15
03-15
03-15

16-18     Reserved
16-18
16-18
16-18

19-31     SDD for previous Entry in the CMS.
19-31
19-31
19-31

32-63     LBA.  The File ID and File LBA.
32-63
32-63
32-63


                            (Image Omitted)

Figure 1. Write Cache State Change Diagram.  The numbers represent
          the state change below.

Note:  The Update command can make any transition occur.
Note:
Note:
Note:

1 Create SDD List        Allocate SDD List when system requests a
                         write.
2 Release SDD List       Free an SDD List.
3 DMA Write and Insert   System requests a write.
4 Op Build               Build a write request for a DASD or fo...