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Browse Prior Art Database

High-Performance Boiling Chimney for Enhanced Pool Boiling

IP.com Disclosure Number: IPCOM000106211D
Original Publication Date: 1993-Oct-01
Included in the Prior Art Database: 2005-Mar-20
Document File: 2 page(s) / 75K

Publishing Venue

IBM

Related People

Chrysler, GM: AUTHOR

Abstract

A method of extending critical heat flux (CHF) for computer chips in pool boiling without attaching any extended surface directly to the chip is presented in this disclosure. The CHF for a chip can be extended by positioning a chimney over the chip. With the chimney in place, the cooling process is changed from natural convection and pool boiling to a pressure driven forced convection; the source of the pressure differential is buoyancy.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

High-Performance Boiling Chimney for Enhanced Pool Boiling

      A method of extending critical heat flux (CHF) for computer
chips in pool boiling without attaching any extended surface directly
to the chip is presented in this disclosure.  The CHF for a chip can
be extended by positioning a chimney over the chip.  With the chimney
in place, the cooling process is changed from natural convection and
pool boiling to a pressure driven forced convection; the source of
the pressure differential is buoyancy.

      The two images of the figure shows the basic ideas of the
disclosure.  The left hand side of the top image of the figure shows
the typical engineering drawing with hidden lines and the right hand
side shows a cut-away sectional view of the chimney.  The chimney 1
is placed over a microelectronic chip 2 mounted on a substrate 3 as
is typical of computer applications.  For the invention to work the
chimney does not have to be attached to the chip, just positioned
over it.  The chimney is attached to the substrate through a
connection scheme 4.  The attachment of the chimney can be
accomplished in a number of ways.  The possible mounting methods
include:  individual chimneys positioned with solder pads on the
substrate, individual chimneys positioned with clips to a single chip
carrier, an array of chimneys mounted to the edge of the substrate
with clips.  For PS/2* or RISC* applications involving canned chips
the chimney could be attached to the can in much the same way heat
sinks are know.  They could be soldered to the can or held in place
with clips to the edges of the can.

     ...