Browse Prior Art Database

Dynamic Address Reassignment Using Storage Reference Analysis

IP.com Disclosure Number: IPCOM000106298D
Original Publication Date: 1993-Oct-01
Included in the Prior Art Database: 2005-Mar-20
Document File: 2 page(s) / 59K

Publishing Venue

IBM

Related People

Greenstein, PG: AUTHOR [+2]

Abstract

Disclosed is an enhancement to the storage address reassignment mechanism disclosed in [*].

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 59% of the total text.

Dynamic Address Reassignment Using Storage Reference Analysis

      Disclosed is an enhancement to the storage address reassignment
mechanism disclosed in [*].

      The disclosed enhancement maximizes the efficiency of central
computer storage accesses using analysis of storage reference
patterns.  The enhancement is to continually analyze central storage
reference patterns, and as required, reassign 'in use' storage frames
to balance the totality of storage references across storage
elements.

      The operating system will request hardware to accumulate the
count of central storage references on a storage sub-increment (SI)
level.  Accumulating storage reference counts would be done in
parallel with the actual storage access.  After accumulating storage
references for a period of time, hardware will analyze the counts,
and if required, transfer the counts to the operating system for
further analysis in preparation for storage reassignment.  Any
mechanism for transferring the buffer counts may be used.

      It has been empirically determined that a 20% storage reference
distribution skew between storage elements is the least significant
deviation that should cause a storage reassignment to be taken.

      If storage reference count analysis by the hardware shows that
the number of storage references for each storage element is within
plus or minus 20% of the expected references (if all references were
equally distributed (100%)), hardware will...