Browse Prior Art Database

Architecture Validation Programs Generation for Any User Programs

IP.com Disclosure Number: IPCOM000106318D
Original Publication Date: 1993-Oct-01
Included in the Prior Art Database: 2005-Mar-20
Document File: 2 page(s) / 78K

Publishing Venue

IBM

Related People

Kahle, JA: AUTHOR [+4]

Abstract

Disclosed is a scheme to convert user programs into AVPs (Architecture Validation Programs) format so that the simulation model (CEFS) can execute them. With this tool, designers could convert any benchmarks into AVPs and feed them into the simulation model so that they could analyze the program behavior as well as estimate system's performance before physically building the system. In addition, designers could also develop test programs written in high level languages and feed them into the simulation model to verify their design.

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Architecture Validation Programs Generation for Any User Programs

      Disclosed is a scheme to convert user programs into AVPs
(Architecture Validation Programs) format so that the simulation
model (CEFS) can execute them.  With this tool, designers could
convert any benchmarks into AVPs and feed them into the simulation
model so that they could analyze the program behavior as well as
estimate system's performance before physically building the system.
In addition, designers could also develop test programs written in
high level languages and feed them into the simulation model to
verify their design.

      Each AVP can be partitioned into two major sections:
instruction section and data section.  Instruction section contains
instruction address and instruction itself.  Data section includes
the content of all architecture registers and the the effective
address of all load and store instructions as well as memory content
of those addresses.  The instruction section information is almost
static except the starting address of the program in the run time;
however, the data section information is almost dynamic, and it's
available only while the program is being executed.  Therefore,
tracing technique is applied in this invention to capture the
run-time information for AVP generation.

      By tracing the user program in a single-step mode, i.e., one
instruction at a time, all run-time information will be captured,
which includes the instruction address, instruction itself, the
contents of all architecture registers, and the content of all memory
locations.  With the register content, the effective addresses for
load and store instructions could then be calculated, and data in
that address could then be retrieved from the memory if the address...