Browse Prior Art Database

Method for Expanding Monitor Identification Capability

IP.com Disclosure Number: IPCOM000106332D
Original Publication Date: 1993-Oct-01
Included in the Prior Art Database: 2005-Mar-20
Document File: 2 page(s) / 93K

Publishing Venue

IBM

Related People

Flinders, M: AUTHOR [+4]

Abstract

Disclosed is a method for expanding the capability of display adapter logic to determine the identity of a connected monitor type from among as many as 256 different possibilities, while using the four identification pins available at the present connection between monitor cables and adapter logic.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Method for Expanding Monitor Identification Capability

      Disclosed is a method for expanding the capability of display
adapter logic to determine the identity of a connected monitor type
from among as many as 256 different possibilities, while using the
four identification pins available at the present connection between
monitor cables and adapter logic.

      As shown in the Figure, identification connections 10 are made
within cable plug 12 to pins 14 electrically connected to four
identification lines 16 within adapter logic 18.  These lines 16 are
reserved for determining the type of monitor attached to logic 18 by
cable 20.  A number of other lines 21, extending between adapter
logic 18 and the monitor, are used to provide the red, green, and
blue driving functions, along with other functions.  To enable the
identification function, each of the four identification pins 14  is
connected to electrical ground line 22, left unattached, or connected
to either horizontal synch line 24 or vertical synch line 26
extending between adapter logic 18 and the monitor.

      Each pin 14 tied to ground indicates a logical zero level,
while each unattached pin 14 is pulled to +5 volts through a pullup
resistor 28 in adapter logic 18 to be seen as a logical one.  Signals
placed on horizontal synch line 24 and vertical synch line 26 are
outputs of adapter logic 18, which can control the levels of these
lines independently, in accordance with a sequence, before
programming the graphics adapter Cathode Ray Tube Controller (CRTC)
to provide normal synch pulses.

      To determine the connections which have been made to pins 14,
and hence the identification of the monitor, adapter logic 18 first
sets both horizontal and vertical synch outputs to one and reads the
levels of lines 16.  At this point, any lines at a logical zero
levelare are determined to be tied to zero (ground).  Next, the
vertical synch output is set to zero, while the horizontal synch is
left at one.  At this point, any of the remaining lines whic...