Browse Prior Art Database

Low Cost Improved Reliability Oscillator Transition Checker

IP.com Disclosure Number: IPCOM000106353D
Original Publication Date: 1993-Oct-01
Included in the Prior Art Database: 2005-Mar-21
Document File: 2 page(s) / 35K

Publishing Venue

IBM

Related People

Elliott, JC: AUTHOR

Abstract

A method for verifying oscillator transition is disclosed (Figure). A delay ring inside a clock generation chip is used as the timing reference for a counter. The oscillator input is verified to have transitioned both high and low each time the counter value wraps to zero.

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Low Cost Improved Reliability Oscillator Transition Checker

      A method for verifying oscillator transition is disclosed
(Figure).  A delay ring inside a clock generation chip is used as the
timing reference for a counter.  The oscillator input is verified to
have transitioned both high and low each time the counter value wraps
to zero.

      The transition checker is comprised of two parts:  the internal
timing reference and oscillator transition checker itself.

      The internal timing reference is initialized by an external
reset.  When the external reference is removed the delay ring
provides a pulse train with a period of two times the path delay.

      The pulse train feeds a counter which wraps to zero and
generates a carry.  As the counter increments the Oscillator
Generated signal is required to transition both high and low to reset
the two transition detection latches, LTCH3 and LTCH4.  The next
pulse following the carry is used to sample the transition detection
latches.  If either latch is set then the Oscillator Generated signal
did not transition within the time provided by the counter and a
check condition results.  The second pulse following the carry is
used to set LTCH3 and LTCH4 for the next checking cycle.