Browse Prior Art Database

Dynamic Clock Phase Shifter for Logic Delay Tracking

IP.com Disclosure Number: IPCOM000106365D
Original Publication Date: 1993-Oct-01
Included in the Prior Art Database: 2005-Mar-21
Document File: 2 page(s) / 54K

Publishing Venue

IBM

Related People

Capps Jr, LB: AUTHOR [+8]

Abstract

Disclosed is means for dynamically adjusting the phase relationship between clocks based on the delay provided by a logic component in a system.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 67% of the total text.

Dynamic Clock Phase Shifter for Logic Delay Tracking

      Disclosed is means for dynamically adjusting the phase
relationship between clocks based on the delay provided by a logic
component in a system.

      As microprocessor speeds increase, the system clock periods
begin to approach the delays caused by logic components, making
clocked logic operations difficult to perform.  For example,
functional considerations may require clocked logic operations to be
performed within a 20- nanosecond period.  Often, the clock to output
delay within a logic device is the limiting factor in performing
logic operations.

      To compensate for this effect, two clocks of the same frequency
with differing phase angles can be used, providing a greater period
between the phase-shifted clock edges.  The delay between the clock
pulse and the circuit output can thus be hidden by advancing from one
clock to another.

      For example, referring to the figure, a first clocked logic
circuit 1 includes so much delay between a clock pulse and its output
signal, that it may not be able to provide an output signal soon
enough to provide a suitable input to a second clocked logic circuit
2, if both first and second clocked circuits are operated using the
same clock pulses.  However, this delay is cancelled by providing a
delay element 3, with a delay equal to that of circuit 1, in the
feedback loop of a phase locked loop circuit 4 having the system
clock signal as its referenc...