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Dual Error-Forcing Registers for Diagnostic Verification

IP.com Disclosure Number: IPCOM000106546D
Original Publication Date: 1993-Nov-01
Included in the Prior Art Database: 2005-Mar-21
Document File: 2 page(s) / 62K

Publishing Venue

IBM

Related People

Jarvis, TC: AUTHOR [+2]

Abstract

Described is a new way to verify diagnostics by forcing errors with dedicated registers internal to a module. This method is applicable for both diagnostic verification and for verification of code which handles hardware faults operationally.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Dual Error-Forcing Registers for Diagnostic Verification

      Described is a new way to verify diagnostics by forcing errors
with dedicated registers internal to a module.  This method is
applicable for both diagnostic verification and for verification of
code which handles hardware faults operationally.

      Traditional methods of diagnostic verification have involved
"bugging" individual lines on modules or card I/O's by shorting these
lines to ground or Vcc.  There are several problems with this means
of verification:

o   The use of denser logic technologies results in a smaller
    proportion of nets which are buggable.

o   In newer CMOS technologies, bugging module I/O's can result in
    permanent damage to the module being bugged.

o   The bugging process is error prone, whether the bugging is done
    manually or by automated (i.e., robot) means.

o   Bugging lines for diagnostic verification does not allow faulting
    of nets inside individual modules.

      Typically, "error forcing" registers are provided to allow
diagnostics to exercise hardware checkers.  Writing a value to an
error forcing register simulates a fault in logic.  Each error
forcing register is able to force multiple errors.  What error is
forced is dependent on the value written to the error forcing
register.

      Our solution is to duplicate each error forcing register (refer
to the Figure).  There is a "Diagnostic Error Force Register", used
by diagnostics to test hardware, and a duplicate "Verification Error
Force Register",...