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Bipolar Junction Transistor Logic for Use with a Single-Cell Power Supply

IP.com Disclosure Number: IPCOM000106550D
Original Publication Date: 1993-Nov-01
Included in the Prior Art Database: 2005-Mar-21
Document File: 2 page(s) / 75K

Publishing Venue

IBM

Related People

Riggio Jr, SR: AUTHOR

Abstract

Disclosed are logic circuits with standard bipolar junction transistors and resistors, configured to use power from a single battery cell, at 1.1 to 1.5 volts.

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This is the abbreviated version, containing approximately 52% of the total text.

Bipolar Junction Transistor Logic for Use with a Single-Cell Power Supply

      Disclosed are logic circuits with standard bipolar junction
transistors and resistors, configured to use power from a single
battery cell, at 1.1 to 1.5 volts.

      Fig. 1 shows a basic inverter circuit, with the voltage output,
+V, of a single battery cell being applied at a terminal 10.  Since
the base to emitter voltage of both bipolar junction transistors is
approxi- mately half the voltage provided by a single battery cell,
these devices can be connected in this way.  When a high voltage
(logical one) level is applied at input 12, NPN transistor 14 is
turned on, and PNP transistor 16 is turned off, yielding a low
voltage (logical zero) at output terminal 18.  When a low voltage
(logical zero) level is applied at input 12, transistor 14 is turned
off, and transistor 16 is turned on, resulting in a high voltage
(logical one) level at output terminal 18.  This approach allows
equal source and sink currents, with a symmetrical output drive
impedance and relatively equal rise and fall times.

      Fig. 2 shows a NOR gate, with the voltage output of a single
cell applied at terminal 22, with a first input at terminal 24, and
with a second input at terminal 26.  The output of a two-input NOR
gate should be at a logical one level only when both inputs are at a
logical zero level.  When both inputs are at a low voltage (logical
zero) level, NPN transistors 28 are both turned off, while PNP
transistors 30 are turned on, resulting in a high voltage (logical
one) level at output terminal 32.  When either of the inputs is at a
high voltage (logical one) level, the PNP transistor 30 having a base
to which this input current is applied is turned off, and the NPN
transistor 28 having a base to which this input is applied is turned
on.  In this way, the...