Browse Prior Art Database

Load Pointer Queue

IP.com Disclosure Number: IPCOM000106571D
Original Publication Date: 1993-Nov-01
Included in the Prior Art Database: 2005-Mar-21
Document File: 2 page(s) / 59K

Publishing Venue

IBM

Related People

Goetzinger, WJ: AUTHOR [+2]

Abstract

In the classic register renaming scheme, a register is scheduled to become available when a Load instruction causes a new "mapping." This invention removes the requirement of returning more than one address each cycle.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 61% of the total text.

Load Pointer Queue

      In the classic register renaming scheme, a register is
scheduled to become available when a Load instruction causes a new
"mapping." This invention removes the requirement of returning more
than one address each cycle.

      For simplicity the following description assumes that only one
Load instruction may be issued per cycle.  The extension to multiple
Loads per cycle is described later.

      This invention replaces the traditional Load Count fields with
a new device known as the Load Pointer Queue (see Figs. 1 and 2).
This queue is 1 bit wide (assuming 1 load per cycle) and its depth is
1 less than the sum of the depth of the Instruction Queue and the
Return Queue.  When a register is scheduled to be returned, its
address is put in the return queue and a single bit in the Load
Pointer Queue is set = 1.  The Load Pointer Queue is advanced
whenever the Instruction Queue is advanced or if the Instruction
Queue is empty.  If the Load Pointer bit corresponding to the last
arithmetic instruction is 0 it will be set to 1.  If the bit is
already = 1 the next highest bit that equals = 0 will be set to 1.
The Load Pointer Queue must be deeper than the Instruction Queue by 1
less than the depth of the return queue to handle the case where the
return queue is empty, the Instruction Queue is full and then enough
loads are issued to fill the Return Queue.  The first Load Pointer
bit = 1 would be even with the last instruction on the Instru...