Browse Prior Art Database

Internal Signal Land Flares

IP.com Disclosure Number: IPCOM000106716D
Original Publication Date: 1993-Dec-01
Included in the Prior Art Database: 2005-Mar-21
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Conn, RB: AUTHOR [+3]

Abstract

Due to increasing wiring density on printed circuit board packages, the continuing trend has been to reduce Plated Through Hole (PTH) land sizes. With the current limitations of the registration systems (drill, laminations, and circuitize), significant yield loss due to land breakout (of the PTH) results. With this in mind, a technique was developed to improve the yield and also increase reliability of the product. This technique is known as a signal land flare.

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Internal Signal Land Flares

      Due to increasing wiring density on printed circuit board
packages, the continuing trend has been to reduce Plated Through Hole
(PTH) land sizes.  With the current limitations of the registration
systems (drill, laminations, and circuitize), significant yield loss
due to land breakout (of the PTH) results.  With this in mind, a
technique was developed to improve the yield and also increase
reliability of the product.  This technique is known as a signal land
flare.

      The signal land flare provides additional processing latitude
in registration movement without jeopardizing the reliability of the
signal line to PTH connection (Fig. 1).

      A signal flare is an extension/protrusion of the signal land in
the direction of internal line entry.  The signal flare is only added
to the PTHs that have signal line connections.  Thus allowing no
decrease in wireability over the base printed circuit board design.
The addition of these features reduce the likelihood of direct line
entry into a PTH, which can result in an intermittent electrical
connection (Fig. 2).