Browse Prior Art Database

Internal Programmable Line Termination Mechanism

IP.com Disclosure Number: IPCOM000106773D
Original Publication Date: 1993-Dec-01
Included in the Prior Art Database: 2005-Mar-21
Document File: 4 page(s) / 74K

Publishing Venue

IBM

Related People

Andrews, LP: AUTHOR [+3]

Abstract

Described is a hardware and software implementation for communication based equipment that provides an Internal Programmable Line Termination Mechanism (IPLTM) for programming the termination impedance of critical signal lines. The implementation is controlled through the use of microprocessor software or firmware.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 55% of the total text.

Internal Programmable Line Termination Mechanism

      Described is a hardware and software implementation for
communication based equipment that provides an Internal Programmable
Line Termination Mechanism (IPLTM) for programming the termination
impedance of critical signal lines.  The implementation is controlled
through the use of microprocessor software or firmware.

      In prior art, in the design of signal circuitry, certain signal
lines can exhibit poor signal quality in the analog domain.  This
poor signal quality can create functional problems and even cause
electro-magnetic interference (EMI).  In order to reduce the
functional and EMI problems, general engineering practice has been to
utilize proper terminating resistors where the value of the resistors
can vary depending on the circuit functions involved.  Typically,
whenever functional changes are made, a new terminating resistor must
be specified.  This involves a degree of customization to the card to
attain the proper impedance requirements.

      The concept described herein provides a IPLTM for programming
the line termination impedance requirements for critical signal
lines.  Fig. 1 shows a circuit arrangement of the IPLTM.  The
microprocessor is used to program the termination register with the
desired termination value.  Signal bits within the register are load
enabled through open collector driver lines Q1n, Q12, ..., Qn.  A
combination of loads can be programmed to produce the...