Browse Prior Art Database

Multiple Card Interlocking - Power on Reset Control Circuit

IP.com Disclosure Number: IPCOM000106810D
Original Publication Date: 1993-Dec-01
Included in the Prior Art Database: 2005-Mar-21
Document File: 2 page(s) / 53K

Publishing Venue

IBM

Related People

Deskin, BP: AUTHOR [+3]

Abstract

Disclosed is an automatic Power on Reset (POR) circuit for use with multiple subassemblies (cards) which will keep the internal logic on each card reset until all the remaining cards are plugged and powered. This circuit is especially useful for "hot plugging" multiple cards for Active Board Channel Maintenance (ABCM) functions.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 65% of the total text.

Multiple Card Interlocking - Power on Reset Control Circuit

      Disclosed is an automatic Power on Reset (POR) circuit for use
with multiple subassemblies (cards) which will keep the internal
logic on each card reset until all the remaining cards are plugged
and powered.  This circuit is especially useful for "hot plugging"
multiple cards for Active Board Channel Maintenance (ABCM) functions.

In a typical application, this circuit will provide:

1.  that all drive I/O will remain in a high Impedance state until
    the last card is plugged, reducing I/O current and eliminating
    driver contention.

2.  that the POR signal is deactivated at all cards at the same time,
    after all internal logic is powered and given enough time to
    reset.

3.  that the POR signal is asserted to all cards whenever a single
    card is unplugged or its power supply interrupted.

      The circuit is composed of RC network (1), non-inverting
comparators f with hysteresis (2-5), non-inverting open collector
buffers (6-8), and voltage reference (9).

      The operation of the power supply sense circuitry comprised of
RC network (1), and comparator (2) is explained in the reference
below.

      The power supply sense comparator (2) drives two other
comparator circuits (3) and (4).  Comparator (3) generates the signal
(-INH_OUT) which provides the interlock feature for (7) and (8)
generate the (-POR_A) and (-POR_B) outputs used to reset the card's
logic. ...