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New Dummy Cell for Open Bitline Architecture

IP.com Disclosure Number: IPCOM000106940D
Original Publication Date: 1992-Jan-01
Included in the Prior Art Database: 2005-Mar-21
Document File: 3 page(s) / 82K

Publishing Venue

IBM

Related People

Dhong, SH: AUTHOR

Abstract

Disclosed is a new dummy cell for an open-bitline architecture. It is connected to an on-chip reference voltage generator through a gate. As a result, the new dummy cell can be used when the wordline boost voltage is not sufficient to restore the full signal levels.

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New Dummy Cell for Open Bitline Architecture

       Disclosed is a new dummy cell for an open-bitline
architecture.  It is connected to an on-chip reference voltage
generator through a gate.  As a result, the new dummy cell can be
used when the wordline boost voltage is not sufficient to restore the
full signal levels.

      Fig. 1 shows schematically the prior art dummy cell
configuration for the open-bitline architecture.  There are two ways
of operating the dummy cells (1,2).  In the first method, both
wordlines of the dummy cells, DWLL and DWLR, are active when the
bitlines are precharged to a precharge voltage of 1/2 VDD at the end
of a RAS cycle (1).  The capacitors of the dummy cells, CDUML and
CDUMR, are charged to the precharge voltage of 1/2 VDD.   After
charging the dummy cells, DWLL and DWLR become inactive.  When a new
RAS cycle starts, the wordline of the dummy cell connected to the
complement bitline of the selected cell becomes active. For example,
if WL is selected, DWLL becomes active.  After SA is set, DWLR
becomes active.  DWLL and DWLR remain active until the capacitors of
the dummy cells are charged, completing a cycle.

      In the second method which is called the reversal dummy
word-line technique (2), both wordlines of the dummy cells are active
when the bitlines are precharged to a precharge voltage of 1/2 VDD at
the end of a RAS cycle as in the first method.  However, both dummy
wordlines remain active even after the capacitors of the dummy cells
are fully charged.  When a new RAS cycle starts, the wordline of the
dummy cell connected to the true bitline of the selected cell becomes
inactive.  For example, if WL is selected, DWLR be...