Browse Prior Art Database

FPU Exponent Prediction of Possible Denorm Result

IP.com Disclosure Number: IPCOM000106958D
Original Publication Date: 1992-Jan-01
Included in the Prior Art Database: 2005-Mar-21
Document File: 3 page(s) / 89K

Publishing Venue

IBM

Related People

Chu, TV: AUTHOR [+3]

Abstract

In certain floating-point operations, the result could become very small, in the neighborhood of zero, which is called a denormalized number. In this floating point, denormalization requires holding the pipeline and using the dataflow for the denormalization process. If holding the pipeline does not take place early enough, subsequent instructions will be initiated. This could cause a Write After Write (WAW) dependency problem, resulting in instructions completing instruction in the wrong order.

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FPU Exponent Prediction of Possible Denorm Result

       In certain floating-point operations, the result could
become very small, in the neighborhood of zero, which is called a
denormalized number.  In this floating point, denormalization
requires holding the pipeline and using the dataflow for the
denormalization process.  If holding the pipeline does not take place
early enough, subsequent instructions will be initiated.  This could
cause a Write After Write (WAW) dependency problem, resulting in
instructions completing instruction in the wrong order.

      Our interlock handler cannot allow out-of-order execution.  If
an instruction can cause a denormalized result, this needs to be
detected immediately.  Since this floating point uses the main
dataflow to denormalize numbers, it must hold subsequent instructions
in the decode cycle until it can resolve the current data
denormalization.

      Detection of the possibility of denormalization is required in
the multiply cycle.  This allows us to hold the subsequent
instruction in the decode cycle, preventing it from entering the
dataflow.  Only then can denormalization be done without getting the
instructions in the wrong order.

      However, precise determination of a denormalized result does
not occur until the writeback cycle, 2 clocks later. Therefore, we
needed to come up with a denorm prediction in the multiply cycle
which would meet the following goals:  1) signal on a small enough
range to prevent a large number of unnecessary pipeline holds, 2)
have a small hardware cost, and 3) be straightforward enough so as
not to make the design overly complicated.

      The RISC System/6000* (RS/6000) floating-point operations are
in the following form (see Fig. 1):
               R = (A * C) + B
      SC = Ea + Ec - Eb + 56 - bias      is calculated in the
multiply cycle for the shifter

      Notice that the worst case (i.e., B subtracts from A * C and
leaves lea...