Browse Prior Art Database

Formation of Conductive Vias in a Silicon Substrate

IP.com Disclosure Number: IPCOM000107233D
Original Publication Date: 1992-Jan-01
Included in the Prior Art Database: 2005-Mar-21
Document File: 1 page(s) / 38K

Publishing Venue

IBM

Related People

Gregor, LV: AUTHOR [+2]

Abstract

Disclosed is a method to form conductive vias which allow signal and power connections to be made through a silicon substrate.

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This is the abbreviated version, containing approximately 100% of the total text.

Formation of Conductive Vias in a Silicon Substrate

      Disclosed is a method to form conductive vias which allow
signal and power connections to be made through a silicon substrate.

      Holes as small as 50 m inches are formed in the silicon
substrate by anisotropic etching (e.g., in pyrocatechol) (a).  Wires
of slightly smaller diameter and coated with a thin polyimide
insulating layer are threaded through the holes (b).  The annular
spaces between wires and channels are filled with a polyimide resin
(c) by vacuum impregnation.  This assembly is heated to completely
cure the resin, and the wires are cut off close to both surfaces of
the silicon.  Finally, the surfaces are polished flat to the original
condition (d).

      This substrate can now be processed to provide a wiring plane
or planes on one or both surfaces by conventional lithographic
methods for redistribution circuitry.

      Disclosed anonymously.