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High Speed Bipolar ROM with Active Pull Down Bit Line

IP.com Disclosure Number: IPCOM000107249D
Original Publication Date: 1992-Jan-01
Included in the Prior Art Database: 2005-Mar-21
Document File: 1 page(s) / 49K

Publishing Venue

IBM

Related People

Dhong, SH: AUTHOR [+3]

Abstract

Disclosed is a high-speed bipolar read-only memory (ROM) circuit that utilizes an active pull-down technique for bit-line discharge. Essence of the new circuit is to minimize the read access skew by quickly discharging the standby bit line to the active decision level through an additional current pulse, and then a cell is read with the constant current ICS. The Figure shows the implementation of this operation by utilizing an ac-coupled active pull-down circuitry (TPD, R3, R4, R5, and C1) for discharging the bit line. The circuit works as follows. In the steady-state, current through the pull-down transistor TPD is biased at a near-zero value by adjusting the resistors R3, R4, and R5, and bit lines voltage are clamped by TPU. When the bit line BL0 (for example) is selected, the signal CS0 goes high and CS0B goes low.

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High Speed Bipolar ROM with Active Pull Down Bit Line

      Disclosed is a high-speed bipolar read-only memory (ROM)
circuit that utilizes an active pull-down technique for bit-line
discharge.  Essence of the new circuit is to minimize the read access
skew by quickly discharging the standby bit line to the active
decision level through an additional current pulse, and then a cell
is read with the constant current ICS.  The Figure shows the
implementation of this operation by utilizing an ac-coupled active
pull-down circuitry (TPD, R3, R4, R5, and C1) for discharging the bit
line.  The circuit works as follows.  In the steady-state, current
through the pull-down transistor TPD is biased at a near-zero value
by adjusting the resistors R3, R4, and R5, and bit lines voltage are
clamped by TPU.  When the bit line BL0 (for example) is selected, the
signal CS0 goes high and CS0B goes low.  TPU is cut off and ICS is
switched to BL0, while TPD turns on momentarily because the rising
edge of signal CS0 is coupled to the base node of TPD through the
capacitor C1.  Thus, TPD sinks a large pulse of pull-down current
discharging BL0 rapidly. After the signals reach steady levels, BL0
becomes active with ICS and the ac-coupled active pull-down circuit
returns to the steady state.

      When the bit line is unselected, the signal CS0 falls and CS0B
rises.  Then TPU pulls up the bit line fast in the emitterfollower
mode.  The pull-up speed is even faster in the new circuit...