Browse Prior Art Database

Integrated Delay Line

IP.com Disclosure Number: IPCOM000107273D
Original Publication Date: 1992-Feb-01
Included in the Prior Art Database: 2005-Mar-21
Document File: 1 page(s) / 48K

Publishing Venue

IBM

Related People

Griest, AJ: AUTHOR [+3]

Abstract

An integrated delay line has a substrate of a dielectric material, a lower layer of conductor patterns formed on the substrate, a dielectric layer formed on the lower conductor layer, an upper layer of conductor patterns formed on the dielectric layer, and an overlying dielectric coating. The materials for the conductors and dielectrics are conventional in other integrated devices and the layers and conductor patterns are formed by techniques that are conventional for manufacturing other integrated devices.

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This is the abbreviated version, containing approximately 60% of the total text.

Integrated Delay Line

       An integrated delay line has a substrate of a dielectric
material, a lower layer of conductor patterns formed on the
substrate, a dielectric layer formed on the lower conductor layer, an
upper layer of conductor patterns formed on the dielectric layer, and
an overlying dielectric coating.  The materials for the conductors
and dielectrics are conventional in other integrated devices and the
layers and conductor patterns are formed by techniques that are
conventional for manufacturing other integrated devices.

      An input/output bus is formed in the upper conductor layer
along one edge of the device and a ground line is formed in the lower
conductor layer along the opposite edge of the device.  The delay
line is formed as a series of repeating units, each having an
inductor and a capacitor with the appropriate impedance to match the
impedance of the system the delay line is used with.  Optionally,
each unit has a resistor in series with the capacitor.  A unit is
selectively connected with its inductor in series with the
input/output bus and its capacitor between the bus and ground or is
disconnected from the input/output bus.

      In each unit, the upper layer has a rectangularly wound flat
inductor that has its outer end connected directly to a first point
on the bus.  The inside end of the inductor is connected to a second
point on the bus through a conductor in the lower layer.  If a
repeating unit is to be removed from...