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Browse Prior Art Database

Simplified Stringer Free M0 Strap Definition Process

IP.com Disclosure Number: IPCOM000107306D
Original Publication Date: 1992-Feb-01
Included in the Prior Art Database: 2005-Mar-21
Document File: 4 page(s) / 103K

Publishing Venue

IBM

Related People

Stanasolovich, D: AUTHOR [+2]

Abstract

A major increase in the circuit layout density can be achieved if the N+ and P+ regions can be connected (where desired) prior to the first metal level (M1). This technology is defined as the M0 strap process.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Simplified Stringer Free M0 Strap Definition Process

       A major increase in the circuit layout density can be
achieved if the N+ and P+ regions can be connected (where desired)
prior to the first metal level (M1).  This technology is defined as
the M0 strap process.

      Several major problems exist with the conventional M0 in Figs.
1-3.  After the definition of the N+/P+ regions in Fig. 1, the M0
polysilicon is photo-patterned and etched. In Fig. 2, M0 polysilicon
stringers are a very significant problem that is caused by vertical
underlying P1 features. The second problem is shown in Fig. 3.  After
the selective silicon deposition, TiSi2 is formed on the diffusion
and polysilicon features, as well as connecting the M0 strap to the
diffusion regions.  The contact area (between M0 strap and N+/P+
regions) is very small, being only the thickness of the TiSi2 .  As a
result, the M0 to N+/P+ contact resistance is high.  This article
describes a highly effective M0 definition process which eliminates
the possibility of M0 polysilicon stringers contact resistance.

      The process begins following the implantation of the N+ and
Pregions, and the formulation of the TiSi2 regions (Fig. 4).
      1.   Deposit and planarize CVD oxide so that approximately 2500
o of oxide remains over the polysilicon features (Fig. 5).
      2.   The M0 photo level is now defined by conventional
photolithographic methods.  The planarized oxide is etched with the
following etch conditions which have a high rate ratio of oxide to
TiSi2 .
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