Browse Prior Art Database

Hybrid Structured ATM/LAN Switch Network

IP.com Disclosure Number: IPCOM000107338D
Original Publication Date: 1992-Feb-01
Included in the Prior Art Database: 2005-Mar-21
Document File: 4 page(s) / 112K

Publishing Venue

IBM

Related People

Heinzmann, P: AUTHOR [+3]

Abstract

Disclosed is a new, structured approach to a high-speed ATM/LAN switch network with high availability and switching (parallelism) at the nodes.

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This is the abbreviated version, containing approximately 52% of the total text.

Hybrid Structured ATM/LAN Switch Network

       Disclosed is a new, structured approach to a high-speed
ATM/LAN switch network with high availability and switching
(parallelism) at the nodes.

      The concept, as outlined in Fig. 1, proposes a structured
private network which encompasses LANs (e.g., 802.x, FDDI, BCMA LANs)
and ATM.  The switching nodes (SNs) are interconnected via
transmission links which are slotted in nature.  The network is fully
synchronous, so that isochronous traffic can be supported.  Clock
synchronization is described in (1,2).

      The structure of the links between the SNs is shown in Fig. 2.
Scrambling is proposed to avoid 8/10 coding for link efficiency.  In
case of high traffic demands, it is also feasible to provide more
than one link between two SNs. Slot 1 of a cycle frame contains a
special synchronization bit pattern (not scrambled),
synchronization/clock information for the receiving SN, and pointer
information for the boundary between ATM/isochronous slots and
LAN-type traffic slots (where contiguous frame transmission is
supported, see also BCMA (3).  The length of each slot is 53 bytes.
The structure of the first byte of slot 2 to N is shown in Fig.
3. ATM slots have exactly the structure defined in CCITT
recommendation I.361 (4), except that the GFC field is coded
according to Fig. 3.

      The routing of ATM traffic is performed according to the CCITT
rules (4).  For the routing of LAN traffic labels are introduced (see
Fig. 4).  Source and Removal Labels (SL, RL) are partitioned into a
segment and a node field, each having a length of, e.g., 2 bytes.
The segment field is also structured; it contains the segment type
(e.g., BCMA, Token-Ring, FDDI), and the number of the segment of a
specific type.  The node field contains an identification of the node
attached to a specific segment.  The high-speed requirements imposed
on LANs with destination removal requires als...