Browse Prior Art Database

Programmable Micro Channel I/O Slave Address Assignment Using Programmable Option Select

IP.com Disclosure Number: IPCOM000107363D
Original Publication Date: 1992-Feb-01
Included in the Prior Art Database: 2005-Mar-21
Document File: 3 page(s) / 130K

Publishing Venue

IBM

Related People

Chisholm, DR: AUTHOR [+4]

Abstract

This article describes a technique for use in a computer system which allows total flexibility for use of I/O space when designing a Micro Channel* (MC) slave adapter. Choice of the I/O base address is made by writing the upper address bits of the desired base into programmable option select (POS) register.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Programmable Micro Channel I/O Slave Address Assignment Using Programmable Option Select

       This article describes a technique for use in a computer
system which allows total flexibility for use of I/O space when
designing a Micro Channel* (MC) slave adapter.  Choice of the I/O
base address is made by writing the upper address bits of the desired
base into programmable option select (POS) register.

      Conventionally, Micro Channel adapter card designers have to
request an I/O slave address or block of addresses from personal
computer (PC) architecture if the adapter supported I/O slave
functions.  These assigned I/O addresses are then reserved for only
those adapters and no longer available for any other use, regardless
of whether that adapter is in a PC or not.  As the number of
different types of adapter cards increases, the number of available
I/O addresses within the 64K byte I/O address space decreases.
Eventually, all of the 64K I/O addresses will be assigned.

      When the assigned (and reserved) I/O address or I/O address
space was given to an adapter card designer, the I/O address was
either "burned in" to the channel interface logic (making that logic
unique to that adapter), burned in to ROM or programmable ROM (PROM),
or fixed through tie-up and tie-down circuits to input signal pins on
the adapter card, as a method of holding or retaining its assigned
I/O address.  These assigned I/O address signals are used to compare
with the value of the address bus during an I/O command cycle, and
when an equal compare occurs, the adapter card is selected as an I/O
slave.  Data is then written to or read from the addressed I/O port
on the adapter card, dependent on the state of Micro Channel status
lines S0 and S1.

      If the channel interface logic was used on different types of
adapter cards, each different type of adapter card would be required
to have a different I/O slave address or block of addresses.
Therefore, each different adapter using the common channel interface
logic would require a different ROM or PROM with a different I/O
address, or the common channel interface logic would require up to
sixteen unique input signal pins that would be tied-up or tied-down
to indicate different I/O addresses for the different adapters.
Neither of these alternatives is acceptable, especially when the
common channel interface logic is implemented in a very large-scale
integration (VLSI) chip.

      The technique disclosed herein provides the stated benefits by
providing a method of programming, during the syste...