Browse Prior Art Database

Method for Forming Via Hole Formation

IP.com Disclosure Number: IPCOM000107583D
Original Publication Date: 1992-Mar-01
Included in the Prior Art Database: 2005-Mar-22
Document File: 2 page(s) / 60K

Publishing Venue

IBM

Related People

Kohno, Y: AUTHOR [+2]

Abstract

Disclosed is a stacked via formation method for a build-up panel that has the capability of making a high-density circuit panel by via connection.

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This is the abbreviated version, containing approximately 76% of the total text.

Method for Forming Via Hole Formation

       Disclosed is a stacked via formation method for a
build-up panel that has the capability of making a high-density
circuit panel by via connection.

      A connection part, a via hole, between the lower circuit and
the upper one, is formed by replacing a pre-formed organic
photosensitive resist pillar.

      Advantages of this method are:
 - it forms a micro via compared with a photosensitive insulator ma
terial.
 - it reduces the process time compared with the former technique.
 - it controls the via shape by exposing the intensity of photosen
sitive resist.
 - it assures a via connection area to the lower circuit.
 - it reforms organic pillar parts.
 - it forms stacked via, Via on Via, structure.
 - it selects various insulator materials instead of photosensitive
one.

      The process flow of the method for forming stacked via hole
formation is shown in the figure and described below.
Step 1:  Organic photosensitive resist (a) is applied on 1st signal
line (b).
Step 2:  After expose and develop treatment, resist pillar (c) is
formed on a connection area.
Step 3:  Insulator (d) is applied and its surface is leveled.
Step 4:  The resist pillar (c) is stripped.
Step 5:  Conductive layer (e), connecting with the first signal line
(b), is formed on the insulator (d).
Step 6:  The conductive layer (e) is formed into second signal lines
(f).
Stap 7:  Resist pillars (g) are formed on the second lines (...