Browse Prior Art Database

Content Addressable Memory Interface Circuit

IP.com Disclosure Number: IPCOM000107584D
Original Publication Date: 1992-Mar-01
Included in the Prior Art Database: 2005-Mar-22
Document File: 2 page(s) / 105K

Publishing Venue

IBM

Related People

Eckenrode, TJ: AUTHOR [+3]

Abstract

The CONTENT ADDRESSABLE MEMORY INTERFACE CIRCUIT provides the electrical interconnection required to interface a Content Addressable Memory (CAM) to a Media Access Controller (FORMAC) in order to provide multiple node address decode capability on a local area network. The commercially available FORMAC is used on a Fiber-optic Distributed Data Interface (FDDI) local area network card, but supports a minimal number of network node addresses. The commercially available CAM can be used to decode additional node addresses; however, additional logic is required to interconnect the CAM to the FORMAC and also to a local processor. The Content Addressable Memory Interface Circuit (CAMIC), in combination with the CAM, allows the FDDI local area node to respond to up to 256 48-bit network node addresses.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 51% of the total text.

Content Addressable Memory Interface Circuit

       The CONTENT ADDRESSABLE MEMORY INTERFACE CIRCUIT provides
the electrical interconnection required to interface a Content
Addressable Memory (CAM) to a Media Access Controller (FORMAC) in
order to provide multiple node address decode capability on a local
area network.  The commercially available FORMAC is used on a
Fiber-optic Distributed Data Interface (FDDI) local area network
card, but supports a minimal number of network node addresses. The
commercially available CAM can be used to decode additional node
addresses; however, additional logic is required to interconnect the
CAM to the FORMAC and also to a local processor.  The Content
Addressable Memory Interface Circuit (CAMIC), in combination with the
CAM, allows the FDDI local area node to respond to up to 256 48-bit
network node addresses.

      The CAMIC provides an interface between the FORMAC and the CAM
to allow the CAM to compare the address fields of an incoming network
frame to the contents of the CAM.  If any location in the CAM
contains the corresponding network node address, a 'match' occurs.
This match status is returned to the FORMAC to determine whether the
frame should be received (frame is addressed to this node), purged
(frame is not addressed to this node and therefore reception is
aborted), or stripped (frame was sent by this node and should be
removed from network).

      In order to provide this interface, the CAMIC converts outputs
supplied by the FORMAC to inputs acceptable by the CAM.  The FORMAC
initiates reception of a frame by asserting the RECEIVE signal.
Following assertion of this signal, bytes of the frame are output by
the FORMAC on an 8-bit bus during successive clock cycles.  However,
the CAM requires that the destination address and source address of
the incoming frame be buffered and written to the CAM across a 16-bit
data bus. After the destination address is written to the CAM, the
MATCH output of the CAM is latched and returned to the FORMAC as the
External Destination Address Match (XDAMAR) signal.  Likewise, after
the source address is written to the CAM, the MATCH output is latched
and returned to the FORMAC as the External Source Address Match
(XSAMAT) signal. Since 48-bit addresses are used, each address field
requires six successive clock cycles on the FORMAC's 8-bit data bus,
and requires three successive 16-bit writes...