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High Performance Circuits with Power Down and Turbo Charged Operating Mode

IP.com Disclosure Number: IPCOM000107592D
Original Publication Date: 1992-Mar-01
Included in the Prior Art Database: 2005-Mar-22
Document File: 3 page(s) / 133K

Publishing Venue

IBM

Related People

Georgiou, CJ: AUTHOR [+3]

Abstract

Disclosed is a circuit technique which enables the rapid powering down (or re-powering up) of certain logic circuits, and, in some cases, also the adjustment of their switching speed by controlling the operating current. The control of the operating current level is done by a voltage signal applied to a circuit node, which is shared by each of the circuits.

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High Performance Circuits with Power Down and Turbo Charged Operating Mode

       Disclosed is a circuit technique which enables the rapid
powering down (or re-powering up) of certain logic circuits, and, in
some cases, also the adjustment of their switching speed by
controlling the operating current. The control of the operating
current level is done by a voltage signal applied to a circuit node,
which is shared by each of the circuits.

      Figs. 1 and 2 illustrate a class of circuits that can be
powered down and up with a single voltage signal.  These circuits,
the emitter coupled (ECL) logic family of Fig. 1 and the differential
current switch (DCS) of Fig. 2, have their current levels controlled
by the Vbias voltage level and the resistors Rbias1, Rbias2, Rbias3.
Rbias1 and Rbias2 control the total current in  the current switch
(current steering function) and Rbias3 controls the current in the
emitter follower.  Typically, the basic ECL circuit does not have a
current- control transistor, T6, in the emitter of the emitter
follower, but instead, a resistor. The introduction of T6 results in
greater power dissipation than that of a single resistor. However, T6
enables a complete power down of the emitter follower.  Since the
emitter fol lower consumes a significant portion of the power, the
addition of T6 assures a more effective power-down mode.  In the
power-down mode, the circuits are no longer operative. More details
on the operation of ECL and and DCS circuits are provided in (1,2).

      Fig. 3 illustrates a circuit technique to rapidly change Vbias
from its normal operating level to a lower level  which effectively
turns off the currents of the logic circuits.  When the input level
to T1 is low, Vbias is in its normal operating mode, i.e., a fixed,
well- controlled level, determined by V2 plus the clamp diode drops
of  Td1 and Td2 minus Vbe of T3.  A positive signal (several hundred
millivolts more  positive than Vref) causes the current of the
current switch circuit to flow through R1.  The negative voltage
change in Vbias is the change in current (T1 current - diode
(Td1/Td2) current) times R1.  Note that diodes Td1 and Td2 are
effectively off and draw no current when T1 is on.

      Although the above current switch circuit families assume
silicon bipolar transistors as the active devices, the same circuit
structure is also used with GaAs FETs, known as  SCFL (3), and the
power-down principles described above applys equally well for the
SCFL circuit family.

      The second type of circuit family whose current levels can be
varied, in addition to being able to be...