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One Step Technique to Achieve Polyimide Planarization and via Formation Using a Resist and Plasma Etch Process

IP.com Disclosure Number: IPCOM000107634D
Original Publication Date: 1992-Mar-01
Included in the Prior Art Database: 2005-Mar-22
Document File: 2 page(s) / 138K

Publishing Venue

IBM

Related People

Farooq, MS: AUTHOR [+4]

Abstract

Disclosed is a unique one-step technique for creating vias in a nonplanar polymer film during multilayer thin film build, and at the same time, achieving planarization of the polymer film.

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One Step Technique to Achieve Polyimide Planarization and via Formation Using a Resist and Plasma Etch Process

       Disclosed is a unique one-step technique for creating
vias in a nonplanar polymer film during multilayer thin film build,
and at the same time, achieving planarization of the polymer film.

      The highest wiring density can be attained only by stacking of
vias, which, in turn, necessitates a planar thin film interconnect.
In these hybrid structures, the wiring level is fabricated by plating
through a photoresist mask. The polyimide dielectric is then spun on
these metallized features.  This polyimide coating acts as the
dielectric for two separate layers: (1) for the wiring layer plated
through the mask, and (2) for the studs to be formed on top of the
wiring layer (Figure 1).  Multiple processes are then required, first
to planarize the polyimide and then to create vias in it to form the
studs.

      In the proposed process, these multiple process steps are
simplified and considerably reduced in the following manner.  A
highly planarizable photoresist is applied in a solvent-rich
atmosphere on top of the nonplanar polyimide. This ensures a planar
topography on the top surface.  The via image is then photopatterned
in the resist layer (Figure 2).  Using a plasma etch process, the
etched via image is transferred to the underlying polyimide.  By
choosing an etch process which has the same etch rates for the resist
and the polyimide, the...