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Fabrication of Narrow Self Aligned Trenches and Isolated N-Type Silicon Region with Buried N+ Layer

IP.com Disclosure Number: IPCOM000107647D
Original Publication Date: 1992-Mar-01
Included in the Prior Art Database: 2005-Mar-22
Document File: 3 page(s) / 69K

Publishing Venue

IBM

Related People

Bennet, RS: AUTHOR [+4]

Abstract

Disclosed is a method for fabricating narrow self-aligned trenches and, at the same time, obtaining an isolated n area with self-aligned buried n+ layer. The key process utilizes an enhanced reactive ion etching (RIE) process of the trench width determined by the thickness of the n+ layer deposited, can be made below 0.25 micron to increase device density. Such narrow width cannot be achieved using current lithography techniques such as G or I line. In addition, due to the self- stopping nature of the technique, RIE lag problem is not an issue for fabricating narrow trenches with high aspect ratio.

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Fabrication of Narrow Self Aligned Trenches and Isolated N-Type Silicon Region with Buried N+ Layer

       Disclosed is a method for fabricating narrow self-aligned
trenches and, at the same time, obtaining an isolated n area with
self-aligned buried n+ layer.  The key process utilizes an enhanced
reactive ion etching (RIE) process of the trench width determined by
the thickness of the n+ layer deposited, can be made below 0.25
micron to increase device density.  Such narrow width cannot be
achieved using current lithography techniques such as G or I line.
In addition, due to the self- stopping nature of the technique, RIE
lag problem is not an issue for fabricating narrow trenches with high
aspect ratio.

      The process flow is as follows.  The substrate is p-type Si.
After the formation of a standard dielectric stack mask for deep
trench (Figure 1), active silicon areas that are required to be
n-type are recessed to a desired depth (Figure 2).  This recess depth
will determine the trench depth.  An n epitaxial Si layer (about 200
nm) is deposited (Figure 3).  The layer thickness will determine the
trench width as well as the effective area of the isolated n-type
region.

      This deposition is followed by a deposition of a n-type
epitaxial silicon layer.  The epitaxial layer is then chemically
polished using TEOS as the stop layer (Figure 4). An enhanced RIE
process that is highly selective to doping concentration is used to
form the self- aligned...