Browse Prior Art Database

BS, Return from Subroutine

IP.com Disclosure Number: IPCOM000107722D
Original Publication Date: 1992-Mar-01
Included in the Prior Art Database: 2005-Mar-22
Document File: 1 page(s) / 32K

Publishing Venue

IBM

Related People

Emma, PG: AUTHOR [+4]

Abstract

This article describes a method of improving performance of Branch History Table (BHT) machines by early resolution of target address of BCR'F' return.

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BS, Return from Subroutine

       This article describes a method of improving performance
of Branch History Table (BHT) machines by early resolution of target
address of BCR'F' return.

      Approximately 25% of Branch History Table (BHT) errors are due
to target changes of taken branches.  The return from subroutine
linkage achieved by BALR 14, 15... BCR'F' 14 will cause such a target
change for BCR instruction based on a different caller.  A Branch
Stream Processor (BSP) can easily detect this condition and resolve
the target of the branch earlier.  The address used by the BSP can be
derived from two sources depending on conditions that prevail:
      -    If the register is valid, the BSP can use the register.
      -    If the register is invalid, the BSP can derive the
register from its alias as maintained by the BSP.  The intervening L
instruction will provide a shorthand for the memory location at which
the register was stored.  This alias is matched against a stack of
locations for overwritten GPR returns maintained by the BSP.

      The handling of the original BAL (R) by the BSP facilitates
this.  This facility dynamically unrolls the nesting of subroutine
calls, all using the linkage mentioned and eliminates the need for a
hardware subroutine stack to resolve dynamic targets from the same
branch location.