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CPU Travelling Algorithm for Loading Wait States

IP.com Disclosure Number: IPCOM000107747D
Original Publication Date: 1992-Mar-01
Included in the Prior Art Database: 2005-Mar-22
Document File: 3 page(s) / 131K

Publishing Venue

IBM

Related People

Greenstein, PG: AUTHOR [+2]

Abstract

In an environment where a CPU initiating wait state processing cannot serve as a master for the normal master/slave wait state loading algorithm, an algorithm is introduced that travels from CPU to CPU by means of restart interrupt until it finds one suitable for the normal master/slave process, ultimately performing the function.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 49% of the total text.

CPU Travelling Algorithm for Loading Wait States

       In an environment where a CPU initiating wait state
processing cannot serve as a master for the normal master/slave wait
state loading algorithm, an algorithm is introduced that travels from
CPU  to  CPU by means of restart interrupt until it finds one
suitable for the normal master/slave process, ultimately performing
the function.

      The described algorithm increases the reliability of the wait
state loading function by addressing the problem of the presence of a
single point of failure in the conventional master/slave
multi-processor wait state loading algorithm.

      The described algorithm introduces a function that moves itself
from CPU to CPU in a multiprocessor (MP) environment.
Wait State Loading Algorithm

      In MVS, a moderately complex algorithm is used to quiesce the
system by placing all CPUs in a disabled wait state.  The algorithm
includes a master CPU controlling the process and a set of slave CPUs
that are being placed in a wait state.  When all slave CPUs are
placed in a wait state, the master CPU places itself in a wait state.

      The algorithm is fairly complex.  Complexity and the number and
variety of other functions the algorithm has to rely on undermine its
reliability.
Problem

      The function running on the master CPU represents a single
point of failure.  If the problem that caused the operating system to
attempt to load a disabled wait state in the first place affects what
the wait state loading algorithm relies on, the wait state loading
function will also fail.  Even though recovery is normally
established during wait state processing, the cause of the original
failure may also disrupt the conventional recovery.  For example, the
wait state loading function will fail if CPU-related storage areas
(i.e., those associated with a particular CPU in a multi-processor,
as opposed to global storage areas, shared between all CPUs) on which
it heavily relies, are destroyed (e.g., contain corrupted data, or
are in a storage frame with an unrecoverable storage error).

      An interesting case in MVS environment is that of destroyed
Functional Recovery Routine (FRR) stack, when the wait state loading
function would fail during its attempt to establish recovery.
CPU Travelling Algorithm for Loading Wait States

      Should a failure during wait state loading on the master CPU
occur, or should it be known in advance that the normal wait state
loading function is bound to fail (such as in the case when Recovery
Termination Manager (RTM) invokes the wait state loading function as
a result of destroyed FRR stacks), a new method of placing CPUs in a
wait state is used.

      The algorithm is as follows:
      Note:  The processor on which the process is running is
referred to as "my CPU"; all other processors are referred to as
"other CPU(s)."

      A new restart interruption reason code is defined to...