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Browse Prior Art Database

Error Inject Mechanism

IP.com Disclosure Number: IPCOM000108055D
Original Publication Date: 1992-Apr-01
Included in the Prior Art Database: 2005-Mar-22
Document File: 3 page(s) / 108K

Publishing Venue

IBM

Related People

Bergey Jr, AL: AUTHOR [+3]

Abstract

This invention tests a computer's error-handling capability by allowing an external error forcing tool to force errors within a silicon chip. It can be easily automated to allow the forcing of many points inside one or more chips without manual intervention. Although it requires a diagnostic computer program to set up and arm the mechanism, the actual error injection can occur whenever the external error forcer wants it, including during functional operation. Components and Operation

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Error Inject Mechanism

       This invention tests a computer's error-handling
capability by allowing an external error forcing tool to force errors
within a silicon chip.  It can be easily automated to allow the
forcing of many points inside one or more chips without manual
intervention.  Although it requires a diagnostic computer program to
set up and arm the mechanism, the actual error injection can occur
whenever the external error forcer wants it, including during
functional operation.
Components and Operation

      The hardware required for this invention is shown in the
figure.  It consists of:
1.  A computer-controlled register with
      * One bit to enable or disable the error forcer.
      * Several bits to determine which error is forced.  N bits can
be decoded to force up to 2**N error conditions.
2.  A decoder to select the actual error to be forced.  The decoder
can be disabled by either the computer-controlled enable bit being
off or the external 'Error Inject' being off.
3.  An external '+ Error Inject' input.  An external pull-up resistor
is used to force this input to the active state.

      All of these components are used by the prior art except the '
Error Inject' input.  Proper use of this new input is the novelty of
this invention.

      In the conventional art, this mechanism is used to force errors
within the computer under diagnostic computer control.  The computer
loads the register with a value that forces an error, then loads it
with a value that turns off the error, and then examines the hardware
to ensure that the hardware handled the error in the correct manner.

      Both the prior mechanism and the new mechanism work equally
well for this type of error forcing.  Note that ' + Error Inject',
being normally pulled active, does not inhibit this type of error
force.

      In the new mode, this mechanism is used to force errors within
the computer under external control.  First the hardware must be
properly set up and armed, with the following algorithm:
1.  An external tool pulls ' + Error Inject' to the inactive state.
2.  A diagnostic computer program loads the register with the decode
to force the desired check, and turns on th...