Browse Prior Art Database

Return Address Stack Cache

IP.com Disclosure Number: IPCOM000108056D
Original Publication Date: 1992-Apr-01
Included in the Prior Art Database: 2005-Mar-22
Document File: 3 page(s) / 104K

Publishing Venue

IBM

Related People

Barrera, DD: AUTHOR [+3]

Abstract

The return instruction for the Intel 80386 is basically an unconditional branch where the target address is out somewhere in memory. You must therefore first bring in the address before you can kick off the instruction fetcher. The performance loss here is in waiting for the target address. Disclosed is a design for addressing the performance loss.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Return Address Stack Cache

       The return instruction for the Intel 80386 is basically
an unconditional branch where the target address is out somewhere in
memory.  You must therefore first bring in the address before you can
kick off the instruction fetcher. The performance loss here is in
waiting for the target address.  Disclosed is a design for addressing
the performance loss.

      The current method used by the 80386 to execute near call
returns is to issue a pop instruction to bring in the return address
from the system stack and then start fetching instructions at the
return address.  The proposed method calls for an internal return
stack to hold the return address.  This allows for the fetching at
the return address to occur sooner, eliminating the need for having
to wait for the pop to the system stack to complete.

      The figure shows the data flow associated with the return
prefetcher.  What the data flow is trying to accomplish is to mirror
the system stack.  Up to three call returns are saved for
prefetching.  The address saved is the real address of the return
point (address of the instruction following the call instruction).
Below is the sequence of events which occur during calls.
      1.  Call instruction detected in decode stage.
      2.  Call enters write back stage, instruction pointer of call
is stored (pushed) in RTN 1 or block 1.
      3.  The return instruction is detected in decode stage. The
Fetcher prefetches the return address saved on the return stack.
During write back (of the pop instruction) the stack is popped.  The
prefetched real address is also saved in RTN 3 or block 3 for
validation against the real address (in block 4) in the system stack,
the true return address.
      4.  Return instruction enters the execute stage.  When the pop
from the system stack is completed, the return address is translated
(from virtual to real).
      5.  Return now enters the write back stage.  The real return
address from the system stack is compared against the return address
from the internal return stack.  This function is done to make sure
no code has modified the return address in the syste...