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Bus Data Integrity and Fault Tolerance

IP.com Disclosure Number: IPCOM000108300D
Original Publication Date: 1992-May-01
Included in the Prior Art Database: 2005-Mar-22
Document File: 5 page(s) / 204K

Publishing Venue

IBM

Related People

Johnstone, W: AUTHOR [+4]

Abstract

This article describes a data loop transmission system having added attributes of dynamic error detection, dynamic fault diagnostics, and fault tolerant operation. Incorporating these added attributes in the original system yields a data transmission system with enhanced data integrity.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 50% of the total text.

Bus Data Integrity and Fault Tolerance

       This article describes a data loop transmission system
having added attributes of dynamic error detection, dynamic fault
diagnostics, and fault tolerant operation. Incorporating these added
attributes in the original system yields a data transmission system
with enhanced data integrity.

      The theme of this enhanced system is the implementation of
bidirectional data flow in a data loop configuration. With
bidirectional data flow, the system has dual data sets which it uses
to assess the validity of data transfer operations and perform
diagnostics routines.  During a typical data transmission, the dual
data sets are compared to ensure the validity of the transmission.
When the comparison is true, the transmission is deemed valid and
normal operation is continued.  A false comparison, indicating a
fault condition, invokes diagnostic routines which use the dual data
sets to trace the fault location and identify fault free paths to the
system's nodes.

      In its intended use, a single host with multiple nodes, the
data transmitted contains the following information:
1.   A direction bit:  controlled by the host to set the data flow
direction around the loop.
2.   n* address bits:  used by the host to address an instruction to
any one of the loop's nodes.
3.   A read/write bit:  used by the host to either write to, or read
from, the addressed node.
4.   An enable bit:  used to enable a write operation.
5.   j function bits:  used by the host to define the function of the
read/write operation.
6.   k* information bits:  during a write instruction these bits
provide information to a node; during a read instruction they provide
information from a node. *implementation dependent

      All bits, but the direction bit, are bidirectional.
AB The host and each loop node is configured with dual input/output
ports.  Each bidirectional bit has a transceiver at each node port
and a driver/receiver pair at the host's ports.  The direction bit
has either a driver or a receiver, corresponding to its data flow at
each host/node port.  In the absence of direction information at a
node, the node sets up a default direction.  The system configuration
is illustrated in Fig. 1.

      The flow of data through the loop is controlled by the
send/receive function of the node's transceivers.  The direction of
data flow from a node is a function of the loop flow direction
(controlled by the direction bit), the type of instruction (a read or
a write), and whether it is the addressed node or not.

      During a write instruction, the host sets the state of the
direction bit (corresponding to the desired data flow direction), and
then transmits the bit into the loop.  The direction bit sets the
data flow direction at each node by configuring the node's
transceivers into the receive/send sequence that matches the desired
loop data flow direction.

      The host then ...