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Clock Grouping Algorithm for an LSSD Test

IP.com Disclosure Number: IPCOM000108318D
Original Publication Date: 1992-May-01
Included in the Prior Art Database: 2005-Mar-22
Document File: 4 page(s) / 144K

Publishing Venue

IBM

Related People

Forlenza, O: AUTHOR [+4]

Abstract

This article proposes an efficient and effective algorithm in the generation of Clock Groups that may be pulsed simultaneously during Deterministic and Weighted Random Pattern (WRP) test generation. The extra clocks allow additional AC faults to be detected, which, in turn, reduces the total number of test patterns and, hence, increases tester throughput.

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Clock Grouping Algorithm for an LSSD Test

       This article proposes an efficient and effective
algorithm in the generation of Clock Groups that may be pulsed
simultaneously during Deterministic and Weighted Random Pattern (WRP)
test generation.  The extra clocks allow additional AC faults to be
detected, which, in turn, reduces the total number of test patterns
and, hence, increases tester throughput.

      This new algorithm is very effective when the design is
comprised of a large number of clocks which allow grouping. However,
designs containing, e.g., an "A" clock, a "B" clock, and a "C" clock,
will not be grouped.

      This article describes a novel algorithm for the generation of
Clock Groups that can be applied irrespectively to Deterministic and
Weighted Random Pattern test generation methodologies.  The concept
is an attempt to group L1 and L2 clocks so that clocks in a single
group may be pulsed simultaneously (a requirement necessary to
achieve a complete AC test.)  In addition, it is forbidden to pulse
clocks serially that cannot be pulsed in parallel.  This would imply
a clock execution sequence  dependency which violates the requirement
that a pattern sequence behave as a combinational pattern.

      The concept of the Clock Grouping algorithm is based on a
careful selection of L1 or L2 clocks which can safely be grouped
together.  Incorrect grouping can result in race conditions or the
overlaying of desired values in latches during Deterministic and WRP
test pattern generation. Clocks may be grouped if they satisfy the
following conditions:

      1)  The clocks must be of the same type (Fig. 1) (either L1 or
L2, where an L1 Clock is defined as an LSSD clock that only
propagates to L1 latches, and an L2 Clock as one that only propagates
to L2 latches) (Fig. 1), 2)  The clocks must not propagate to the
same latch (Fig. 2), and 3) The latches clocked by any of the clocks
must not propagate to data lines of latches clocked by any other
clock (Fig. 3).

      The Clock Grouping algorithm itself consists of the following
steps and is shown in the flowchart of Fig. 4
     1)  Determine the number of device inputs (NDI) for all l...