Browse Prior Art Database

Moats to Reduce Backgating

IP.com Disclosure Number: IPCOM000108437D
Original Publication Date: 1992-May-01
Included in the Prior Art Database: 2005-Mar-22
Document File: 1 page(s) / 40K

Publishing Venue

IBM

Related People

Ainspan, HA: AUTHOR [+3]

Abstract

Disclosed is a method to reduce backgating by applying a voltage to the surface of a compound semiconductor.

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This is the abbreviated version, containing approximately 100% of the total text.

Moats to Reduce Backgating

      Disclosed is a method to reduce backgating by applying a
voltage to the surface of a compound semiconductor.

      Backgating in a compound semiconductor circuit is when there is
a voltage on the substrate that is more negative than the source of
the FET being backgated.  The negative potential is transmitted
through the substrate and surface to the back side of the FET
conducting channel and reduces the current flowing through the FET.
The backgating effect makes circuit design difficult because
backgating is very variable depending on voltage difference,
distance, and process.

      Completely surrounding the FET by a voltage applied to the
substrate will reduce the backgating.  The voltage can be applied to
the substrate using ohmic and/or Schottky contacts.  A FET completely
surrounded by an ohmic moat is shown in Fig. 1.  This method has the
advantage that an isolation implant is not needed.  The moat takes up
space and reduces the circuit density.

      Disclosed anonymously.