Browse Prior Art Database

Video Pixel Multiplexer

IP.com Disclosure Number: IPCOM000108485D
Original Publication Date: 1992-Jun-01
Included in the Prior Art Database: 2005-Mar-22
Document File: 3 page(s) / 98K

Publishing Venue

IBM

Related People

Beattie, I: AUTHOR [+4]

Abstract

Disclosed is a module, that provides the means to select pixel data from two different sources, on a pixel by pixel basis. Other features include a data pipeline to allow time to generate the selection logic, and low noise drivers on the output.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 53% of the total text.

Video Pixel Multiplexer

       Disclosed is a module, that provides the means to select
pixel data from two different sources, on a pixel by pixel basis.
Other features include a data pipeline to allow time to generate the
selection logic, and low noise drivers on the output.

      In complex graphics environments it is sometimes necessary for
the hardware to display data from different sources on the same
screen.  This data would be selected on a pixel by pixel basis at
some multiple of the pixel refresh rate.  Typically, several pixels
worth of data are loaded in the RAMDAC (Random Access Memory
Digital-to- Analog Converter) simultaneously.  This allows the data
path to operate at a much slower rate than the pixel refresh rate of
the CRT (Cathode Ray Tube) video display.  This slower rate is often
called the "Load Clock" as it is the clock that loads the data into
the RAMDACs.  Fig. 1 contains a block diagram of this.  When this is
implemented with discrete parts, two problems occur.  This first is
that a large number of parts are required for the multiplexing
because the data buses are generally very wide, usually 32 to 48
bits.  The second problem is this logic must happen in the period of
one load clock.  On a high resolution display this period may be as
little as 30 nanoseconds.  Much of this time is used by the data
access time of the serial port on the VRAM (Video Random Access
Memory). The data can be piped using discrete latches, but that
incr...