Browse Prior Art Database

Internal Arbiter Enables/Disables

IP.com Disclosure Number: IPCOM000108637D
Original Publication Date: 1992-Jun-01
Included in the Prior Art Database: 2005-Mar-22
Document File: 1 page(s) / 31K

Publishing Venue

IBM

Related People

Arimilli, RK: AUTHOR [+4]

Abstract

The IBM RISC System/6000* contains an I/O Channel Controller (IOCC) which generates the Micro Channel* bus. The Micro Channel arbiter is contained within the IOCC and allows bus ownership to requesting bus devices. The arbiter requires certain I/O bus conditions to begin an arbitration cycle on the I/O bus. Devices on the I/O bus that want to perform multiple bus cycles need to disable the arbiter by driving the -BURST signal active. However, certain controllers within the IOCC also need to be capable of disabling arbitration. One way this can be achieved is by the IOCC driving the (open collector signal) -BURST active. However, this requires an additional I/O pin to the IOCC and the IOCC would have to adhere to all of the Micro Channel arbiter timings and protocols.

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Internal Arbiter Enables/Disables

       The IBM RISC System/6000* contains an I/O Channel
Controller (IOCC) which generates the Micro Channel* bus.  The Micro
Channel arbiter is contained within the IOCC and allows bus ownership
to requesting bus devices.  The arbiter requires certain I/O bus
conditions to begin an arbitration cycle on the I/O bus.  Devices on
the I/O bus that want to perform multiple bus cycles need to disable
the arbiter by driving the -BURST signal active.  However, certain
controllers within the IOCC also need to be capable of disabling
arbitration.  One way this can be achieved is by the IOCC driving the
(open collector signal) -BURST active.  However, this requires an
additional I/O pin to the IOCC and the IOCC would have to adhere to
all of the Micro Channel arbiter timings and protocols.  Instead, the
IOCC contains internal arbiter enables/disables.  This allows the
controllers within the IOCC to have more direct control of the
arbiter, thus reducing control logic and improving Micro Channel
performance by eliminating bus protocol/timings overhead and allowing
look-ahead conditions to the arbiter to optimize system performance.
*  Trademark of IBM Corp.