Browse Prior Art Database

Multiple FIFOs for Improved Context Switching in Graphics Adapters

IP.com Disclosure Number: IPCOM000108705D
Original Publication Date: 1992-Jun-01
Included in the Prior Art Database: 2005-Mar-22
Document File: 2 page(s) / 76K

Publishing Venue

IBM

Related People

Flurry, GA: AUTHOR [+2]

Abstract

Disclosed is a mechanism for improved switching of rendering contexts in a graphics adapter. The mechanism depends on multiple independent first-in, first-out (FIFO) buffers for issuing commands to an adapter.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Multiple FIFOs for Improved Context Switching in Graphics Adapters

       Disclosed is a mechanism for improved switching of
rendering contexts in a graphics adapter.  The mechanism depends on
multiple independent first-in, first-out (FIFO) buffers for issuing
commands to an adapter.

      When a graphics adapter is to be used in a Direct Window Access
environment, several user level processes may access the adapter
"simultaneously."  In reality, however, the system CPU is multiplexed
between the several processes. Each process is dispatched out and
dispatched in at times unknown to the process.  Thus when a first
process gets dispatched out, it has left a varied state on the
adapter; this state includes register contents and the FIFO through
which the process sends rendering commands to the adapter. If an
adapter contains only a single FIFO, then the contents of the FIFO
must be saved as part of the context of the first process before
another process can use the adapter. The context (including the FIFO)
of a second process must be restored on the adapter before that
process can run.  Saving the FIFO content of the first process takes
time and system storage, as does saving and restoring the FIFO
contents of the second process.

      If the adapter hardware provides support for multiple FIFOs,
the time and system storage required to save the FIFO contents can be
eliminated and performance is improved.  The basic requirements are
that the adapter support multiple independent storage spaces for the
FIFOs.  Each FIFO consists of a data space plus input (for the
process) and output (for the adapter) pointers into the FIFO data
space. In addition...