Browse Prior Art Database

Improved High Availability DASD Sub-system Configuration

IP.com Disclosure Number: IPCOM000108719D
Original Publication Date: 1992-Jun-01
Included in the Prior Art Database: 2005-Mar-22
Document File: 2 page(s) / 100K

Publishing Venue

IBM

Related People

Craft, DJ: AUTHOR

Abstract

An improved arrangement of DASD or other storage devices is described for ensuring availability of the stored data in the event of failure of one or more of the individual devices. Description

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Improved High Availability DASD Sub-system Configuration

       An improved arrangement of DASD or other storage devices
is described for ensuring availability of the stored data in the
event of failure of one or more of the individual devices.
Description

      The operation will be described specifically in terms of groups
of 4 DASD drives or spindles; however, it is important to note that
the idea can be applied to other group sizes and other types of
storage devices including optical storage devices and solid-state
storage devices such as RAM or EEPROM, at either the chip, module or
card level.

      The way in which data is distributed over the 4 DASD spindles
in one group is shown below.  The file data is 4-way interleaved to
give 4 separate data streams for writing to the separate DASD
spindles.  I will reference these spindles as 0,1,2 and 3, and the
interleaved blocks of data as A,B,C and D.  File data bytes 0 through
3 become byte 0 of data blocks A through D, respectively, file data
bytes 4 through 7 become byte 1 of data blocks A through D,
respectively, and so on.

      The data blocks A,B,C,D are written to the spindles 0,1,2,3 as
shown, but in addition, a further block of data is written to each
spindle to provide the recovery capability.  For spindle 0, this data
block is the exclusive OR function of data blocks B and C, (B^C),
while for spindle 1 through spindle 3, we use C^D, D^A and A^B,
respectively.

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      For normal operation, the data is read from all 4 spindles at
the same time, using the "normal" blocks of data A,B,C,D.  This data
is passed sector-by-sector into the FIFO buffers, which perform the
function of byte alignment of the data as well as buffering.  For
good performance, the drive spindles are assumed to be electronically
synchronized, but even if this is done, the timing of individual
bytes of data from the 4 spindles will be uncertain by some number of
bytes due to individual spindle speed or phase variations within the
synchronization envelope, so some FIFO buffering is needed.  Also,
there is the possibility that there may be defective sectors on some
of the spindles, so there is no guarantee that logically co...