Browse Prior Art Database

Event Detection PC Feature Card

IP.com Disclosure Number: IPCOM000108857D
Original Publication Date: 1992-Jun-01
Included in the Prior Art Database: 2005-Mar-23
Document File: 1 page(s) / 54K

Publishing Venue

IBM

Related People

Nguyen, KT: AUTHOR

Abstract

In reliability testing of solder joints and connectors, the integrity of electrical connections are routinely determined by measuring their resistance. A high resistance reading, above some specified threshold, indicates a defective joint or connection. Static resistance measurements, however, cannot detect defects such as non-wets or cracks in solder joints or loose connector pins since these may give acceptable resistance readings at the time of measurement but will fail intermittently when under thermal or mechanical stress. Repeated sampling measurements are not fast enough to catch short intermittents (less than one microsecond in duration), especially when thousands of joints must be monitored. Intermittent defect detection requires a continuous monitoring system.

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Event Detection PC Feature Card

      In reliability testing of solder joints and connectors, the
integrity of electrical connections are routinely determined by
measuring their resistance.  A high resistance reading, above some
specified threshold, indicates a defective joint or connection.
Static resistance measurements, however, cannot detect defects such
as non-wets or cracks in solder joints or loose connector pins since
these may give acceptable resistance readings at the time of
measurement but will fail intermittently when under thermal or
mechanical stress.  Repeated sampling measurements are not fast
enough to catch short intermittents (less than one microsecond in
duration), especially when thousands of joints must be monitored.
Intermittent defect detection requires a continuous monitoring
system.

      Disclosed is a PC feature card for event detection. The event
detection PC adapter card is composed of the detector block, the
latch block and the bus interface block. The detectors compare
incoming analog signals to the reference threshold voltage.  Events
detected are then stored by digital latches until the CPU can read
them.  The bus interface block allows the CPU to read the latches,
set their mode of detection and program the threshold reference
voltage.

      Rx, the net being monitored, together with Rp, an internal
pull-up resistor, form a voltage divider network in the detector
section. Variation in the value of Rx is thus tracked by V...