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Enhanced FET Design and Reliability by Channel Materials Modification

IP.com Disclosure Number: IPCOM000108866D
Original Publication Date: 1992-Jun-01
Included in the Prior Art Database: 2005-Mar-23
Document File: 1 page(s) / 65K

Publishing Venue

IBM

Related People

Nesbit, LA: AUTHOR [+2]

Abstract

Modifications to a conventional CMOS process are described that improve PFET design and reliability. Implanting epitaxial germanium (Ge) in the channel region prior to gate oxidation yields precise control of the channel doping profile by minimizing oxygen enhanced diffusion (OED) of implanted boron during gate oxidation. The need for implanting boron in the PFET channel through the gate oxide is eliminated. Integrity of the gate oxide is maintained. The resulting improved channel doping control extends the scalability and performance of PFETs with npolysilicon gates to ULSI applications.

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Enhanced FET Design and Reliability by Channel Materials Modification

      Modifications to a conventional CMOS process are described that
improve PFET design and reliability.  Implanting epitaxial germanium
(Ge) in the channel region prior to gate oxidation yields precise
control of the channel doping profile by minimizing oxygen enhanced
diffusion (OED) of implanted boron during gate oxidation.  The need
for implanting boron in the PFET channel through the gate oxide is
eliminated.  Integrity of the gate oxide is maintained. The resulting
improved channel doping control extends the scalability and
performance of PFETs with npolysilicon gates to ULSI applications.

      The proposed technique consists of forming one or more layers
of epitaxial germanium in the channel region between the gate
dielectric and the channel silicon (Si).  Such a structure is known
to (1) reduce the OED of boron and also the diffusion kinetics of
phosphorous and arsenic, and (2) enhance the oxidation of Si while
avoiding the formation of germanium-oxide compounds.  Since the hole
mobility of Ge is about four times that of Si, and the electron
mobility of Ge is about three times that of Si, the new structure
offers the potential for improved FET device performance.  The
improved performance requires atomically near-perfect interface
structures between Si and Ge layers in the channel regions.  The
process steps described below realize the required degree of
perfection for the Ge im...