Browse Prior Art Database

Counter to Synchronize Internal Logic Analyzers' Data

IP.com Disclosure Number: IPCOM000108931D
Original Publication Date: 1992-Jul-01
Included in the Prior Art Database: 2005-Mar-23
Document File: 2 page(s) / 75K

Publishing Venue

IBM

Related People

Paulson, PJ: AUTHOR [+3]

Abstract

Counters are used to synchronize logic analyzer (trace array) traces in a multi-processor system. These counters are used to align the trace data from multiple trace arrays by storing a bit in the trace array that indicates when a trigger has occurred.

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Counter to Synchronize Internal Logic Analyzers' Data

       Counters are used to synchronize logic analyzer (trace
array) traces in a multi-processor system.  These counters are used
to align the trace data from multiple trace arrays by storing a bit
in the trace array that indicates when a trigger has occurred.

      An internal synchronize counter is implemented in each
processor in a multi-processor system.  All synchronize counters are
initialized to the same value, started at the same time, and count in
unison.  When a common trigger occurs, the synchronize counter value
is saved in a synchronize save register.  This is necessary because
the common trigger may not trigger all the processors at the same
time.  The synchronize save registers' values of each of the
processors, that were triggered, are compared to determine which
processor triggered first and the relative alignment of the traces.
To assist in the alignment and interpretation of the trace, a bit is
used in the trace arrays to save the trigger value.

      Processor-A has the following:
o  Trace Array-1 to gather trace data,
o  Internal Synchronize counter2
o  Synchronize Save register-3 to save the Synchronize counter-2 when
Processor-A's logic analyzer triggers

      Processor-B has the following:
o  Trace Array-4 to gather trace data,
o  Internal Synchronize counter-5
o  Synchronize Save register-6 to save the Synchronize counter-5 when
Processor-B's logic analyzer triggers...