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Way to Generate Waveform which Represents both CMOS and BiCMOS Circuit

IP.com Disclosure Number: IPCOM000108937D
Original Publication Date: 1992-Jul-01
Included in the Prior Art Database: 2005-Mar-23
Document File: 2 page(s) / 109K

Publishing Venue

IBM

Related People

Aipperspach, AG: AUTHOR [+2]

Abstract

Complementary Metal Oxide Semiconductor (CMOS) and Bipolar Complementary Metal Oxide Semiconductor (BICMOS) logic books drive loads with inherently different waveforms. A CMOS output will look roughly sine-squared. However, a BICMOS output will have a very sharp transition time in the region between a Vbe from GND to a Vbe below the upper rail and will have slower transitions outside this region where small finishing devices complete transitions. The differences between CMOS and BICMOS waveforms present a formidable challenge to the circuit designer when writing delay equations to predict book delays based on output loading and input transition time.

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Way to Generate Waveform which Represents both CMOS and BiCMOS Circuit

       Complementary Metal Oxide Semiconductor (CMOS) and
Bipolar Complementary Metal Oxide Semiconductor (BICMOS) logic books
drive loads with inherently different waveforms.  A CMOS output will
look roughly sine-squared.  However, a BICMOS output will have a very
sharp transition time in the region between a Vbe from GND to a Vbe
below the upper rail and will have slower transitions outside this
region where small finishing devices complete transitions.  The
differences between CMOS and BICMOS waveforms present a formidable
challenge to the circuit designer when writing delay equations to
predict book delays based on output loading and input transition
time.  In a mixed technology environment, transition times measured
using a standard approach of taking the time difference between two
output levels are less useful for performing delay analysis.  Greatly
different delays can be generated for books driven by waveforms of
differing technology but, with identical standard transition times,
leading to significant delay mismatching.  A new approach to
transition time solves the delay mismatching problem by introducing
the concept of equivalent waveforms.  In this approach, a measure of
the "overdrive area" of a waveform is made.  Two waveforms with the
same "overdrive area" are said to be equivalent if each drive has a
logic book (either CMOS or BICMOS) with the same delay.

      When delay is measured for a logic book, a load capacitance is
attached at the book output, and a waveform is supplied to drive the
book input.  This is done for a variety of capacitance values and
input transition times.  The goal for generating delays in a CMOS/
BICMOS technology environment is to supply an input waveform that
represents, from a timing standpoint, both CMOS and BICMOS waveforms,
i.e., to find an equivalent waveform.  To be equivalent, the input
waveform must be designed to generate the same delays through logic
books as the actual CMOS or BICMOS waveforms would.  It was
discovered that overdrive areas could be associated with CMOS and
BICMOS input waveforms that were very closely linked to the generated
delays through CMOS and BICMOS logic books.  Therefore, an input
waveform must be constructed such that,...