Browse Prior Art Database

Method for enabling misaligned packed data type instructions load operand instructions

IP.com Disclosure Number: IPCOM000109202D
Publication Date: 2005-Mar-23
Document File: 2 page(s) / 18K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for enabling misaligned packed data type instructions load operand instructions. Benefits include improved functionality and improved performance.

This text was extracted from a Microsoft Word document.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 54% of the total text.

Method for enabling misaligned packed data type instructions load operand instructions

 

Disclosed is a method for enabling misaligned packed data type instructions load operand instructions. Benefits include improved functionality and improved performance.

Background

              The conventional definition of packed data type instructions specifies that if the instruction has a memory operand that is not aligned to a 16-byte boundary, the instruction generates a fault condition. If a memory operand is not guaranteed to be aligned, the programmer must preload the data into a register using a special unaligned load. Additionally, the register should be referenced as an operand and a memory operand should not be used directly. Register allocation and value storing is processed by the address generation unit address generation logic.

              The conventional processing mechanism forces the compiler to use an unaligned load procedure if alignment is doubted, even if the load is perfectly aligned when executed. This procedure is intended as a safety margin. However, the compiler is forced to take a processing penalty. The procedure consumes much more energy, toggles many more gates than necessary, and increases latency. As a result, a high percentage of loads are incorrectly handled as misalignments.

              Future processors are expected to handle misaligned loads with no timing penalty. The continued use of the conventional instruction definition would unduly penalize performance.

             

Description

              The disclosed method enables misaligned packed data type instructions load operand instructions. The method enables a processing mode in which misaligned access to packed data type instructions data does not cause faults. Alternatively, a new version of each packed data type instruction is effectively provided that utilizes a memory operand without unduly burdening the instruction decoder. A prefix is added to the front of an packed data type instruction with a memory operand. The me...